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| author | Clifford Wolf <clifford@clifford.at> | 2018-09-19 15:07:28 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2018-09-19 15:07:28 +0200 |
| commit | f1972b6c9084d9eb5e13cd8d07702fba8a5fe7bb (patch) | |
| tree | e0d9302ac85ad4a3df2c960b650d6d94fa37e58b | |
| parent | 592a82c0ad8beb6de023aa2a131aab6472f949e8 (diff) | |
| parent | efac8a45a6965bdcbb7fb810d657d2c63b6cb7fe (diff) | |
| download | yosys-f1972b6c9084d9eb5e13cd8d07702fba8a5fe7bb.tar.gz yosys-f1972b6c9084d9eb5e13cd8d07702fba8a5fe7bb.tar.bz2 yosys-f1972b6c9084d9eb5e13cd8d07702fba8a5fe7bb.zip | |
Merge pull request #631 from acw1251/master
Fixed typo in "verilog_write" help message
| -rw-r--r-- | backends/verilog/verilog_backend.cc | 6 | ||||
| -rw-r--r-- | manual/command-reference-manual.tex | 4 |
2 files changed, 5 insertions, 5 deletions
diff --git a/backends/verilog/verilog_backend.cc b/backends/verilog/verilog_backend.cc index d3262ec47..ae9031510 100644 --- a/backends/verilog/verilog_backend.cc +++ b/backends/verilog/verilog_backend.cc @@ -1523,7 +1523,7 @@ struct VerilogBackend : public Backend { log("\n"); log(" -nodec\n"); log(" 32-bit constant values are by default dumped as decimal numbers,\n"); - log(" not bit pattern. This option decativates this feature and instead\n"); + log(" not bit pattern. This option deactivates this feature and instead\n"); log(" will write out all constants in binary.\n"); log("\n"); log(" -decimal\n"); @@ -1531,13 +1531,13 @@ struct VerilogBackend : public Backend { log("\n"); log(" -nohex\n"); log(" constant values that are compatible with hex output are usually\n"); - log(" dumped as hex values. This option decativates this feature and\n"); + log(" dumped as hex values. This option deactivates this feature and\n"); log(" instead will write out all constants in binary.\n"); log("\n"); log(" -nostr\n"); log(" Parameters and attributes that are specified as strings in the\n"); log(" original input will be output as strings by this back-end. This\n"); - log(" decativates this feature and instead will write string constants\n"); + log(" deactivates this feature and instead will write string constants\n"); log(" as binary numbers.\n"); log("\n"); log(" -defparam\n"); diff --git a/manual/command-reference-manual.tex b/manual/command-reference-manual.tex index 8af8ccdd0..fea2354e6 100644 --- a/manual/command-reference-manual.tex +++ b/manual/command-reference-manual.tex @@ -4421,13 +4421,13 @@ Write the current design to a Verilog file. -nodec 32-bit constant values are by default dumped as decimal numbers, - not bit pattern. This option decativates this feature and instead + not bit pattern. This option deactivates this feature and instead will write out all constants in binary. -nostr Parameters and attributes that are specified as strings in the original input will be output as strings by this back-end. This - decativates this feature and instead will write string constants + deactivates this feature and instead will write string constants as binary numbers. -defparam |