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| author | Clifford Wolf <clifford@clifford.at> | 2013-03-28 16:53:40 +0100 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2013-03-28 16:53:40 +0100 |
| commit | d60fbaf6644de91a3d9ea58295ac8e2ddd6cd363 (patch) | |
| tree | 72b6a1866644e91a7d907f478b6071568b0eb6ff | |
| parent | eff8c68dd94cf90e2026db5a0bbb99b02a9fd8c2 (diff) | |
| download | yosys-d60fbaf6644de91a3d9ea58295ac8e2ddd6cd363.tar.gz yosys-d60fbaf6644de91a3d9ea58295ac8e2ddd6cd363.tar.bz2 yosys-d60fbaf6644de91a3d9ea58295ac8e2ddd6cd363.zip | |
Added EXTRA_TARGETS Makefile variable
| -rw-r--r-- | Makefile | 3 | ||||
| -rw-r--r-- | techlibs/Makefile.inc | 2 |
2 files changed, 3 insertions, 2 deletions
@@ -16,6 +16,7 @@ OBJS += libs/sha1/sha1.o OBJS += libs/subcircuit/subcircuit.o GENFILES = +EXTRA_TARGETS = TARGETS = yosys yosys-config all: top-all @@ -60,7 +61,7 @@ include passes/*/Makefile.inc include backends/*/Makefile.inc include techlibs/Makefile.inc -top-all: $(TARGETS) +top-all: $(TARGETS) $(EXTRA_TARGETS) yosys: $(OBJS) $(CXX) -o yosys $(LDFLAGS) $(OBJS) $(LDLIBS) diff --git a/techlibs/Makefile.inc b/techlibs/Makefile.inc index 031a4ad30..6c2a5f66a 100644 --- a/techlibs/Makefile.inc +++ b/techlibs/Makefile.inc @@ -1,5 +1,5 @@ -TARGETS += techlibs/blackbox.v +EXTRA_TARGETS += techlibs/blackbox.v techlibs/blackbox.v: techlibs/blackbox.sed techlibs/simlib.v techlibs/stdcells_sim.v cat techlibs/simlib.v techlibs/stdcells_sim.v | sed -rf techlibs/blackbox.sed > techlibs/blackbox.v.new |