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| author | Claire Wolf <clifford@clifford.at> | 2020-04-23 11:28:05 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-04-23 11:28:05 +0200 |
| commit | ca31027fe1eb5f3881005954b1cc9c8f7497042a (patch) | |
| tree | bad625d096ead1cdd15e0b6096e041e1c313e051 | |
| parent | 3d149aff733692b368919191dc31e731cbba9cfa (diff) | |
| parent | 5028e17f7db11f901ce9e423dfe2c6f7e68259cc (diff) | |
| download | yosys-ca31027fe1eb5f3881005954b1cc9c8f7497042a.tar.gz yosys-ca31027fe1eb5f3881005954b1cc9c8f7497042a.tar.bz2 yosys-ca31027fe1eb5f3881005954b1cc9c8f7497042a.zip | |
Merge pull request #1986 from YosysHQ/eddie/verific_enum
verific: import enum attributes from verific
| -rw-r--r-- | frontends/verific/verific.cc | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/frontends/verific/verific.cc b/frontends/verific/verific.cc index 519151310..ae7fcefa7 100644 --- a/frontends/verific/verific.cc +++ b/frontends/verific/verific.cc @@ -1153,6 +1153,26 @@ void VerificImporter::import_netlist(RTLIL::Design *design, Netlist *nl, std::se for (auto net : anyseq_nets) module->connect(net_map_at(net), module->Anyseq(new_verific_id(net))); + char *id_name; + TypeRange *type_range; + FOREACH_MAP_ITEM(nl->GetTypeRangeTable(), mi, &id_name, &type_range) + { + if (!type_range) + continue; + if (!type_range->IsTypeEnum()) + continue; + auto wire = module->wire(RTLIL::escape_id(id_name)); + log_assert(wire); + wire->set_string_attribute(ID(wiretype), type_range->GetTypeName()); + + MapIter mj; + char *k, *v; + FOREACH_MAP_ITEM(type_range->GetEnumIdMap(), mj, &k, &v) { + IdString key = stringf("\\enum_value_%s", v); + wire->set_string_attribute(key, k); + } + } + pool<Instance*, hash_ptr_ops> sva_asserts; pool<Instance*, hash_ptr_ops> sva_assumes; pool<Instance*, hash_ptr_ops> sva_covers; |