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| author | Miodrag Milanović <mmicko@gmail.com> | 2022-04-18 09:49:21 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-04-18 09:49:21 +0200 |
| commit | c3a3f68b4de5487d5b16b99972f76e48d4bf48b7 (patch) | |
| tree | 5c286fdb8eb846226123dfa31f268339b10857c4 | |
| parent | 1cc281ca6fc4035a8f48fd7b7a0289cb580c3f4c (diff) | |
| parent | 2610b0403327ebb93ea185be0e48d909a1856130 (diff) | |
| download | yosys-c3a3f68b4de5487d5b16b99972f76e48d4bf48b7.tar.gz yosys-c3a3f68b4de5487d5b16b99972f76e48d4bf48b7.tar.bz2 yosys-c3a3f68b4de5487d5b16b99972f76e48d4bf48b7.zip | |
Merge pull request #3280 from YosysHQ/micko/fix_readaiw
Fix reading aiw from other solvers
| -rw-r--r-- | Makefile | 2 | ||||
| -rw-r--r-- | passes/sat/sim.cc | 4 |
2 files changed, 3 insertions, 3 deletions
@@ -142,7 +142,7 @@ bumpversion: # is just a symlink to your actual ABC working directory, as 'make mrproper' # will remove the 'abc' directory and you do not want to accidentally # delete your work on ABC.. -ABCREV = 00b674d +ABCREV = 3da9357 ABCPULL = 1 ABCURL ?= https://github.com/YosysHQ/abc ABCMKARGS = CC="$(CXX)" CXX="$(CXX)" ABC_USE_LIBSTDCXX=1 VERBOSE=$(Q) diff --git a/passes/sat/sim.cc b/passes/sat/sim.cc index ca4aab566..9c431ab25 100644 --- a/passes/sat/sim.cc +++ b/passes/sat/sim.cc @@ -1231,13 +1231,13 @@ struct SimWorker : SimShared { std::string line; std::getline(f, line); - if (line.size()==0 || line[0]=='#') continue; + if (line.size()==0 || line[0]=='#' || line[0]=='c' || line[0]=='f' || line[0]=='u') continue; if (line[0]=='.') break; if (state==0 && line.size()!=1) { // old format detected, latch data state = 2; } - if (state==1 && line[0]!='b' && line[0]!='c') { + if (state==1 && line[0]!='b' && line[0]!='j') { // was old format but with 1 bit latch top->setState(latches, status); state = 3; |