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| author | Sergey <37293587+SergeyDegtyar@users.noreply.github.com> | 2019-09-12 06:24:18 +0300 |
|---|---|---|
| committer | Miodrag Milanovic <mmicko@gmail.com> | 2019-10-17 17:10:02 +0200 |
| commit | c340d54657688542c5f3a8dabe3f68563dcc8d1c (patch) | |
| tree | 4a5197728b0e4fb8df4d63ef2c6e3ae343aca44d | |
| parent | 205f52ffe53778daf9fc1bcdd9bee4b53a6e2a60 (diff) | |
| download | yosys-c340d54657688542c5f3a8dabe3f68563dcc8d1c.tar.gz yosys-c340d54657688542c5f3a8dabe3f68563dcc8d1c.tar.bz2 yosys-c340d54657688542c5f3a8dabe3f68563dcc8d1c.zip | |
Fix div_mod test
| -rw-r--r-- | tests/xilinx/div_mod.ys | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/tests/xilinx/div_mod.ys b/tests/xilinx/div_mod.ys index e1c4d6912..7db336d00 100644 --- a/tests/xilinx/div_mod.ys +++ b/tests/xilinx/div_mod.ys @@ -8,7 +8,7 @@ cd top # Constrain all select calls below inside the top module select -assert-count 12 t:LUT1 select -assert-count 23 t:LUT2 select -assert-count 12 t:LUT4 -select -assert-count 6 t:LUT5 +select -assert-count 9 t:LUT5 select -assert-count 80 t:LUT6 select -assert-count 65 t:MUXCY select -assert-count 36 t:MUXF7 |