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| author | Eddie Hung <eddie@fpgeh.com> | 2019-10-04 10:34:16 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-10-04 10:34:16 -0700 |
| commit | c0f54d3fd5e2492afbe1717a67ea78f3be7f6b39 (patch) | |
| tree | fdd624024317fef15ab970e807c5902b695e3052 | |
| parent | 2ed2e9c3e8f2d9d6882588857c8556a6e2af57ea (diff) | |
| download | yosys-c0f54d3fd5e2492afbe1717a67ea78f3be7f6b39.tar.gz yosys-c0f54d3fd5e2492afbe1717a67ea78f3be7f6b39.tar.bz2 yosys-c0f54d3fd5e2492afbe1717a67ea78f3be7f6b39.zip | |
Ohmilord this wasn't added all this time!?!
| -rw-r--r-- | techlibs/ice40/abc_model.v | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/techlibs/ice40/abc_model.v b/techlibs/ice40/abc_model.v new file mode 100644 index 000000000..89961b51d --- /dev/null +++ b/techlibs/ice40/abc_model.v @@ -0,0 +1,29 @@ +(* abc9_box_id = 1, lib_whitebox *) +module \$__ICE40_CARRY_WRAPPER ( + (* abc_carry *) + output CO, + output O, + input A, B, + (* abc_carry *) + input CI, + input I0, I3 +); + parameter LUT = 0; + SB_CARRY carry ( + .I0(A), + .I1(B), + .CI(CI), + .CO(CO) + ); + SB_LUT4 #( + .LUT_INIT(LUT) + ) adder ( + .I0(I0), + .I1(A), + .I2(B), + .I3(I3), + .O(O) + ); +endmodule + + |