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authorRupert Swarbrick <rswarbrick@gmail.com>2020-07-03 11:12:03 +0100
committerMarcelina Koƛcielnicka <mwk@0x04.net>2020-07-03 12:30:12 +0200
commita9b61080a409d3ad2c8ff4a9bbef9ba1c9c1d194 (patch)
tree34dff22ba5027de6938612e7a1ed6501feabeb8e
parent3d8d98d7093aa92f858a98d21a82cd453d8481dc (diff)
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Add newlines to help text for dfflegalize
I think these were probably missed by accident. Spotted because GCC spits out lots of messages like this: passes/techmap/dfflegalize.cc:114:7: warning: zero-length gnu_printf format string [-Wformat-zero-length] 114 | log(""); | ^~ (because we tell GCC that the first argument to log() looks like a printf control string in log.h, and a zero length such string triggers a warning).
-rw-r--r--passes/techmap/dfflegalize.cc22
1 files changed, 11 insertions, 11 deletions
diff --git a/passes/techmap/dfflegalize.cc b/passes/techmap/dfflegalize.cc
index 013f2d974..7f2cdc6ac 100644
--- a/passes/techmap/dfflegalize.cc
+++ b/passes/techmap/dfflegalize.cc
@@ -111,31 +111,31 @@ struct DffLegalizePass : public Pass {
log("- $_DLATCHSR_[NP][NP][NP]_\n");
log("\n");
log("The following transformations are performed by this pass:");
- log("");
+ log("\n");
log("- upconversion from a less capable cell to a more capable cell, if the less");
log(" capable cell is not supported (eg. dff -> dffe, or adff -> dffsr)");
- log("");
+ log("\n");
log("- unmapping FFs with clock enable (due to unsupported cell type or -mince)");
- log("");
+ log("\n");
log("- unmapping FFs with sync reset (due to unsupported cell type or -minsrst)");
- log("");
+ log("\n");
log("- adding inverters on the control pins (due to unsupported polarity)");
- log("");
+ log("\n");
log("- adding inverters on the D and Q pins and inverting the init/reset values\n");
log(" (due to unsupported init or reset value)");
- log("");
+ log("\n");
log("- converting sr into adlatch (by tying D to 1 and using E as set input)");
- log("");
+ log("\n");
log("- emulating unsupported dffsr cell by adff + adff + sr + mux");
- log("");
+ log("\n");
log("- emulating unsupported dlatchsr cell by adlatch + adlatch + sr + mux");
- log("");
+ log("\n");
log("- emulating adff when the (reset, init) value combination is unsupported by\n");
log(" dff + adff + dlatch + mux");
- log("");
+ log("\n");
log("- emulating adlatch when the (reset, init) value combination is unsupported by\n");
log("- dlatch + adlatch + dlatch + mux");
- log("");
+ log("\n");
log("If the pass is unable to realize a given cell type (eg. adff when only plain dff");
log("is available), an error is raised.");
}