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| author | Clifford Wolf <clifford@clifford.at> | 2018-12-17 16:29:25 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2018-12-17 16:29:25 +0100 |
| commit | 97b49d6e4532e7bfd183c8d87113e4993b246b77 (patch) | |
| tree | 9bb39af9bf93f7ce38ef9f4bb351732f8ca9a410 | |
| parent | ce701fd3348f43e66a445ef58e4818adaf3e574d (diff) | |
| parent | 4effb38e6d318e2e233bdfa9f2e0bb67e4998bf0 (diff) | |
| download | yosys-97b49d6e4532e7bfd183c8d87113e4993b246b77.tar.gz yosys-97b49d6e4532e7bfd183c8d87113e4993b246b77.tar.bz2 yosys-97b49d6e4532e7bfd183c8d87113e4993b246b77.zip | |
Merge pull request #741 from whitequark/ilang_slice_sigspec
read_ilang: allow slicing all sigspecs, not just wires
| -rw-r--r-- | frontends/ilang/ilang_parser.y | 16 |
1 files changed, 6 insertions, 10 deletions
diff --git a/frontends/ilang/ilang_parser.y b/frontends/ilang/ilang_parser.y index bfc062fec..b957ecd96 100644 --- a/frontends/ilang/ilang_parser.y +++ b/frontends/ilang/ilang_parser.y @@ -387,17 +387,13 @@ sigspec: $$ = new RTLIL::SigSpec(current_module->wires_[$1]); free($1); } | - TOK_ID '[' TOK_INT ']' { - if (current_module->wires_.count($1) == 0) - rtlil_frontend_ilang_yyerror(stringf("ilang error: wire %s not found", $1).c_str()); - $$ = new RTLIL::SigSpec(current_module->wires_[$1], $3); - free($1); + sigspec '[' TOK_INT ']' { + $$ = new RTLIL::SigSpec($1->extract($3)); + delete $1; } | - TOK_ID '[' TOK_INT ':' TOK_INT ']' { - if (current_module->wires_.count($1) == 0) - rtlil_frontend_ilang_yyerror(stringf("ilang error: wire %s not found", $1).c_str()); - $$ = new RTLIL::SigSpec(current_module->wires_[$1], $5, $3 - $5 + 1); - free($1); + sigspec '[' TOK_INT ':' TOK_INT ']' { + $$ = new RTLIL::SigSpec($1->extract($5, $3 - $5 + 1)); + delete $1; } | '{' sigspec_list '}' { $$ = $2; |