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| author | Eddie Hung <eddieh@ece.ubc.ca> | 2019-02-21 11:16:57 -0800 |
|---|---|---|
| committer | Eddie Hung <eddieh@ece.ubc.ca> | 2019-02-21 11:16:57 -0800 |
| commit | 5994382a20a0b7e890d22d032eecb39b61e0b3ce (patch) | |
| tree | a4f370afe400fb5921adb86b747d8f2378a85ca0 | |
| parent | 107da3becff01cdedf6572ece3af9a74463a3e93 (diff) | |
| download | yosys-5994382a20a0b7e890d22d032eecb39b61e0b3ce.tar.gz yosys-5994382a20a0b7e890d22d032eecb39b61e0b3ce.tar.bz2 yosys-5994382a20a0b7e890d22d032eecb39b61e0b3ce.zip | |
tests/simple to also do LUT synth
| -rwxr-xr-x | tests/tools/autotest.sh | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/tests/tools/autotest.sh b/tests/tools/autotest.sh index 65fd4cb1f..34007b689 100755 --- a/tests/tools/autotest.sh +++ b/tests/tools/autotest.sh @@ -180,6 +180,7 @@ do else test_passes -f "$frontend $include_opts" -p "hierarchy; proc; opt; memory; opt; fsm; opt -full -fine" ${bn}_ref.v test_passes -f "$frontend $include_opts" -p "hierarchy; synth -run coarse; techmap; opt; abc -dff" ${bn}_ref.v + test_passes -f "$frontend $include_opts" -p "hierarchy; synth -run coarse; techmap; opt; abc -lut 4" ${bn}_ref.v if [ -n "$firrtl2verilog" ]; then if test -z "$xfirrtl" || ! grep "$fn" "$xfirrtl" ; then "$toolsdir"/../../yosys -b "firrtl" -o ${bn}_ref.fir -f "$frontend $include_opts" -p "prep -nordff; proc; opt; memory; opt; fsm; opt -full -fine; pmuxtree" ${bn}_ref.v |