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| author | Eddie Hung <eddie@fpgeh.com> | 2019-05-23 11:26:38 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-05-23 11:26:38 -0700 |
| commit | 47f9ea142fcca94577519ede3de44b7c8b4f4379 (patch) | |
| tree | 1b1617d0136ef2d193ed3d224f4bd7595fd0aa60 | |
| parent | 50ed34a6d0fe1013fae0a14165fc4fce1d1a3685 (diff) | |
| download | yosys-47f9ea142fcca94577519ede3de44b7c8b4f4379.tar.gz yosys-47f9ea142fcca94577519ede3de44b7c8b4f4379.tar.bz2 yosys-47f9ea142fcca94577519ede3de44b7c8b4f4379.zip | |
Add opt_rmdff tests
| -rw-r--r-- | tests/various/opt_rmdff.v | 30 | ||||
| -rw-r--r-- | tests/various/opt_rmdff.ys | 25 |
2 files changed, 55 insertions, 0 deletions
diff --git a/tests/various/opt_rmdff.v b/tests/various/opt_rmdff.v new file mode 100644 index 000000000..224b8d418 --- /dev/null +++ b/tests/various/opt_rmdff.v @@ -0,0 +1,30 @@ +module opt_rmdff_test (input C, input D, input E, output reg [16:0] Q); +\$dffe #(.WIDTH(1), .CLK_POLARITY(1), .EN_POLARITY(1)) remove0 (.CLK(C), .D(D), .EN(1'b0), .Q(Q[0])); +initial Q[1] = 1'b1; +\$dffe #(.WIDTH(1), .CLK_POLARITY(1), .EN_POLARITY(1)) remove1 (.CLK(C), .D(D), .EN(1'b0), .Q(Q[1])); +\$dffe #(.WIDTH(1), .CLK_POLARITY(1), .EN_POLARITY(1)) remove2 (.CLK(C), .D(D), .EN(1'bx), .Q(Q[2])); +\$dffe #(.WIDTH(1), .CLK_POLARITY(1), .EN_POLARITY(1)) keep2 (.CLK(C), .D(D), .EN(1'b1), .Q(Q[2])); +initial Q[3] = 1'b0; +\$dffe #(.WIDTH(1), .CLK_POLARITY(0), .EN_POLARITY(1)) keep3 (.CLK(C), .D(D), .EN(1'b1), .Q(Q[3])); +\$dffe #(.WIDTH(1), .CLK_POLARITY(1), .EN_POLARITY(0)) remove4 (.CLK(C), .D(D), .EN(1'b1), .Q(Q[4])); +\$dffe #(.WIDTH(1), .CLK_POLARITY(1), .EN_POLARITY(0)) remove5 (.CLK(C), .D(D), .EN(1'bx), .Q(Q[5])); +initial Q[6] = 1'b0; +\$dffe #(.WIDTH(1), .CLK_POLARITY(0), .EN_POLARITY(0)) keep6 (.CLK(C), .D(D), .EN(E), .Q(Q[6])); + +\$_DFFE_PP_ remove7 (.C(C), .D(D), .E(1'b0), .Q(Q[7])); +initial Q[8] = 1'b1; +\$_DFFE_PP_ remove8 (.C(C), .D(D), .E(1'b0), .Q(Q[8])); +\$_DFFE_PP_ remove9 (.C(C), .D(D), .E(1'bx), .Q(Q[9])); +\$_DFFE_PP_ keep10 (.C(C), .D(D), .E(1'b1), .Q(Q[10])); +initial Q[11] = 1'b0; +\$_DFFE_PP_ keep11 (.C(C), .D(D), .E(1'b1), .Q(Q[11])); + +\$_DFFE_NN_ remove12 (.C(C), .D(D), .E(1'b1), .Q(Q[12])); +initial Q[13] = 1'b1; +\$_DFFE_NN_ remove13 (.C(C), .D(D), .E(1'b1), .Q(Q[13])); +\$_DFFE_NN_ remove14 (.C(C), .D(D), .E(1'bx), .Q(Q[14])); +\$_DFFE_NN_ keep15 (.C(C), .D(D), .E(1'b0), .Q(Q[15])); +initial Q[16] = 1'b0; +\$_DFFE_NN_ keep16 (.C(C), .D(D), .E(1'b0), .Q(Q[16])); + +endmodule diff --git a/tests/various/opt_rmdff.ys b/tests/various/opt_rmdff.ys new file mode 100644 index 000000000..fffffb4b5 --- /dev/null +++ b/tests/various/opt_rmdff.ys @@ -0,0 +1,25 @@ +read_verilog -icells opt_rmdff.v +prep +design -stash gold +read_verilog -icells opt_rmdff.v +opt_rmdff + +select -assert-count 0 c:remove* +select -assert-min 7 c:keep* + +prep +design -stash gate + +design -import gold -as gold +design -import gate -as gate + +equiv_make gold gate equiv +hierarchy -top equiv +equiv_simple -undef +equiv_status -assert + +design -load gold +stat + +design -load gate +stat |