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| author | Pepijn de Vos <pepijndevos@gmail.com> | 2019-09-05 17:25:51 +0200 |
|---|---|---|
| committer | Pepijn de Vos <pepijndevos@gmail.com> | 2019-09-05 17:25:51 +0200 |
| commit | 47374a495d3cbfa424cbe312aa4762e7c4e855ff (patch) | |
| tree | 911ddb203c9b62a175a9bf62e945cd1ff7c4d1a4 | |
| parent | 7a43be5e431f7518203b37bad2eb9ffb3b74add4 (diff) | |
| download | yosys-47374a495d3cbfa424cbe312aa4762e7c4e855ff.tar.gz yosys-47374a495d3cbfa424cbe312aa4762e7c4e855ff.tar.bz2 yosys-47374a495d3cbfa424cbe312aa4762e7c4e855ff.zip | |
support bram initialisation
| -rw-r--r-- | techlibs/gowin/Makefile.inc | 10 | ||||
| -rw-r--r-- | techlibs/gowin/bram.txt | 3 | ||||
| -rwxr-xr-x | techlibs/gowin/brams_init.py | 8 | ||||
| -rw-r--r-- | techlibs/gowin/brams_map.v | 5 | ||||
| -rw-r--r-- | techlibs/gowin/synth_gowin.cc | 2 |
5 files changed, 25 insertions, 3 deletions
diff --git a/techlibs/gowin/Makefile.inc b/techlibs/gowin/Makefile.inc index 6f2159349..d2853704b 100644 --- a/techlibs/gowin/Makefile.inc +++ b/techlibs/gowin/Makefile.inc @@ -15,3 +15,13 @@ $(eval $(call add_share_file,share/gowin,techlibs/gowin/dram.txt)) $(eval $(call add_share_file,share/gowin,techlibs/gowin/brams_init3.vh)) +EXTRA_OBJS += techlibs/gowin/brams_init.mk +.SECONDARY: techlibs/gowin/brams_init.mk + +techlibs/gowin/brams_init.mk: techlibs/gowin/brams_init.py + $(Q) mkdir -p techlibs/gowin + $(P) python3 $< + $(Q) touch $@ + +techlibs/gowin/bram_init_16.vh: techlibs/gowin/brams_init.mk +$(eval $(call add_gen_share_file,share/gowin,techlibs/gowin/bram_init_16.vh)) diff --git a/techlibs/gowin/bram.txt b/techlibs/gowin/bram.txt index b5f9a981c..366a7106e 100644 --- a/techlibs/gowin/bram.txt +++ b/techlibs/gowin/bram.txt @@ -1,6 +1,5 @@ bram $__GW1NR_SDP -# uncomment when done -# init 1 + init 1 abits 10 @a10d18 dbits 16 @a10d18 abits 11 @a11d9 diff --git a/techlibs/gowin/brams_init.py b/techlibs/gowin/brams_init.py new file mode 100755 index 000000000..b78eb8da5 --- /dev/null +++ b/techlibs/gowin/brams_init.py @@ -0,0 +1,8 @@ +#!/usr/bin/env python3 + +with open("techlibs/gowin/bram_init_16.vh", "w") as f: + for i in range(0, 0x40): + low = i << 8 + hi = ((i+1) << 8)-1 + snippet = "INIT[%d:%d]" % (hi, low) + print(".INIT_RAM_%02X({%s})," % (i, snippet), file=f) diff --git a/techlibs/gowin/brams_map.v b/techlibs/gowin/brams_map.v index e963cfa88..c60330b4f 100644 --- a/techlibs/gowin/brams_map.v +++ b/techlibs/gowin/brams_map.v @@ -28,6 +28,7 @@ module \$__GW1NR_SDP (CLK2, CLK3, A1ADDR, A1DATA, A1EN, B1ADDR, B1DATA, B1EN); generate if (CFG_DBITS == 1) begin SDP #( + `include "bram_init_16.vh" .READ_MODE(0), .BIT_WIDTH_0(1), .BIT_WIDTH_1(1), @@ -42,6 +43,7 @@ module \$__GW1NR_SDP (CLK2, CLK3, A1ADDR, A1DATA, A1EN, B1ADDR, B1DATA, B1EN); ); end else if (CFG_DBITS == 2) begin SDP #( + `include "bram_init_16.vh" .READ_MODE(0), .BIT_WIDTH_0(2), .BIT_WIDTH_1(2), @@ -56,6 +58,7 @@ module \$__GW1NR_SDP (CLK2, CLK3, A1ADDR, A1DATA, A1EN, B1ADDR, B1DATA, B1EN); ); end else if (CFG_DBITS <= 4) begin SDP #( + `include "bram_init_16.vh" .READ_MODE(0), .BIT_WIDTH_0(4), .BIT_WIDTH_1(4), @@ -70,6 +73,7 @@ module \$__GW1NR_SDP (CLK2, CLK3, A1ADDR, A1DATA, A1EN, B1ADDR, B1DATA, B1EN); ); end else if (CFG_DBITS <= 8) begin SDP #( + `include "bram_init_16.vh" .READ_MODE(0), .BIT_WIDTH_0(8), .BIT_WIDTH_1(8), @@ -84,6 +88,7 @@ module \$__GW1NR_SDP (CLK2, CLK3, A1ADDR, A1DATA, A1EN, B1ADDR, B1DATA, B1EN); ); end else if (CFG_DBITS <= 16) begin SDP #( + `include "bram_init_16.vh" .READ_MODE(0), .BIT_WIDTH_0(16), .BIT_WIDTH_1(16), diff --git a/techlibs/gowin/synth_gowin.cc b/techlibs/gowin/synth_gowin.cc index 3581d050e..cfddcec12 100644 --- a/techlibs/gowin/synth_gowin.cc +++ b/techlibs/gowin/synth_gowin.cc @@ -229,7 +229,7 @@ struct SynthGowinPass : public ScriptPass if (check_label("vout")) { if (!vout_file.empty() || help_mode) - run(stringf("write_verilog -nohex -decimal -attr2comment -defparam -renameprefix gen %s", + run(stringf("write_verilog -decimal -attr2comment -defparam -renameprefix gen %s", help_mode ? "<file-name>" : vout_file.c_str())); } } |