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| author | Eddie Hung <eddie@fpgeh.com> | 2020-04-16 14:01:54 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2020-05-14 10:33:56 -0700 |
| commit | 4017cc6380c3b13f416e55e4e65cf98e7caf45e1 (patch) | |
| tree | e25fd2e2eae201a303b7253e1a57f01d68edea37 | |
| parent | 722540dbf942d2b8acbaf7372001c7d982eb2845 (diff) | |
| download | yosys-4017cc6380c3b13f416e55e4e65cf98e7caf45e1.tar.gz yosys-4017cc6380c3b13f416e55e4e65cf98e7caf45e1.tar.bz2 yosys-4017cc6380c3b13f416e55e4e65cf98e7caf45e1.zip | |
aiger: -xaiger to return $_FF_ flops
| -rw-r--r-- | frontends/aiger/aigerparse.cc | 17 |
1 files changed, 2 insertions, 15 deletions
diff --git a/frontends/aiger/aigerparse.cc b/frontends/aiger/aigerparse.cc index 16e94c394..d25587e48 100644 --- a/frontends/aiger/aigerparse.cc +++ b/frontends/aiger/aigerparse.cc @@ -787,21 +787,8 @@ void AigerReader::post_process() log_assert(q->port_input); q->port_input = false; - Cell* ff; - int clock_index = mergeability[i]; - if (clock_index & 1) { - ff = module->addCell(NEW_ID, ID($_DFF_N_)); - clock_index--; - } - else - ff = module->addCell(NEW_ID, ID($_DFF_P_)); - auto r = mergeability_to_clock.insert(clock_index); - if (r.second) - r.first->second = module->addWire(NEW_ID); - ff->setPort(ID::C, r.first->second); - ff->setPort(ID::D, d); - ff->setPort(ID::Q, q); - log_assert(GetSize(q) == 1); + Cell* ff = module->addFfGate(NEW_ID, d, q); + ff->attributes[ID::abc9_mergeability] = mergeability[i]; q->attributes[ID::init] = initial_state[i]; } |