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| author | Eddie Hung <eddie@fpgeh.com> | 2019-07-11 14:25:47 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-07-11 14:25:47 -0700 |
| commit | 3ef927647c04bccce1d72751f6fb95ac4ac7e98b (patch) | |
| tree | b30117715dd8756ee2bb7cf3a93188a7e6babd73 | |
| parent | 1ada5681340aca5132e4a7bf8fa2d4a6e80adc59 (diff) | |
| download | yosys-3ef927647c04bccce1d72751f6fb95ac4ac7e98b.tar.gz yosys-3ef927647c04bccce1d72751f6fb95ac4ac7e98b.tar.bz2 yosys-3ef927647c04bccce1d72751f6fb95ac4ac7e98b.zip | |
Fix FDCE_1 box
| -rw-r--r-- | techlibs/xilinx/abc_xc7.box | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/techlibs/xilinx/abc_xc7.box b/techlibs/xilinx/abc_xc7.box index 24512ecf7..73f532711 100644 --- a/techlibs/xilinx/abc_xc7.box +++ b/techlibs/xilinx/abc_xc7.box @@ -79,7 +79,7 @@ FDCE 1003 1 5 1 # Inputs: C CE CLR D \$pastQ # Outputs: Q -FDCE_1004 1 1 5 1 +FDCE_1 1004 1 5 1 - 109 - -46 0 # Inputs: C CE D PRE \$pastQ |