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| author | Clifford Wolf <clifford@clifford.at> | 2013-11-04 08:28:13 +0100 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2013-11-04 08:28:13 +0100 |
| commit | 1325514d33e553ab41314e5bc2f879bfd38511c7 (patch) | |
| tree | f3e769b709e5f0db26388d437a1f6d5a6a21b988 | |
| parent | 472117d532c50f8973ad5c02463dcd36e4649f67 (diff) | |
| download | yosys-1325514d33e553ab41314e5bc2f879bfd38511c7.tar.gz yosys-1325514d33e553ab41314e5bc2f879bfd38511c7.tar.bz2 yosys-1325514d33e553ab41314e5bc2f879bfd38511c7.zip | |
Fixes for early width and sign detection in ast simplifier
| -rw-r--r-- | frontends/ast/simplify.cc | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/frontends/ast/simplify.cc b/frontends/ast/simplify.cc index e6db61604..e5cc7c4cc 100644 --- a/frontends/ast/simplify.cc +++ b/frontends/ast/simplify.cc @@ -242,7 +242,7 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage, width_hint = -1; sign_hint = true; for (auto child : children) { - while (child->simplify(false, false, false, stage, -1, false) == true) { } + while (child->simplify(false, false, in_lvalue, stage, -1, false) == true) { } child->detectSignWidthWorker(width_hint, sign_hint); } reset_width_after_children = true; @@ -851,6 +851,7 @@ skip_dynamic_range_lvalue_expansion:; wire->is_output = false; current_ast_mod->children.push_back(wire); + while (wire->simplify(true, false, false, 1, -1, false)) { } AstNode *lvalue = new AstNode(AST_IDENTIFIER); lvalue->str = wire->str; |