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author | Clifford Wolf <clifford@clifford.at> | 2013-11-28 21:47:08 +0100 |
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committer | Clifford Wolf <clifford@clifford.at> | 2013-11-28 21:47:08 +0100 |
commit | 10aa08dca171f6d337a3347467a388291445d868 (patch) | |
tree | 4adb563e4dd04b36c422eeddcb052b4961758627 | |
parent | c60aaf8fa3b7fdd1f827d2741f2ee6f9a323c9ec (diff) | |
download | yosys-10aa08dca171f6d337a3347467a388291445d868.tar.gz yosys-10aa08dca171f6d337a3347467a388291445d868.tar.bz2 yosys-10aa08dca171f6d337a3347467a388291445d868.zip |
Fixed temp net name generation in rtlil process generator for abbreviated name matching
-rw-r--r-- | frontends/ast/genrtlil.cc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/frontends/ast/genrtlil.cc b/frontends/ast/genrtlil.cc index 8aea05969..1453d13a9 100644 --- a/frontends/ast/genrtlil.cc +++ b/frontends/ast/genrtlil.cc @@ -361,6 +361,8 @@ struct AST_INTERNAL::ProcessGenerator do { wire->name = stringf("$%d%s[%d:%d]", new_temp_count[chunk.wire]++, chunk.wire->name.c_str(), chunk.width+chunk.offset-1, chunk.offset);; + if (chunk.wire->name.find('$') != std::string::npos) + wire->name += stringf("$%d", RTLIL::autoidx++); } while (current_module->wires.count(wire->name) > 0); wire->width = chunk.width; current_module->wires[wire->name] = wire; |