diff options
| author | Alberto Gonzalez <boqwxp@airmail.cc> | 2020-03-27 16:44:05 +0000 |
|---|---|---|
| committer | Alberto Gonzalez <boqwxp@airmail.cc> | 2020-04-04 22:13:26 +0000 |
| commit | 09b2264837bf0a2d7d2c9b35f88c2d5924fa4364 (patch) | |
| tree | aa9bdf1f2fafb91518f3d32744225643b26476a7 | |
| parent | acf96b6b0bb7dc04686d89a6dc3aafd19adcdb85 (diff) | |
| download | yosys-09b2264837bf0a2d7d2c9b35f88c2d5924fa4364.tar.gz yosys-09b2264837bf0a2d7d2c9b35f88c2d5924fa4364.tar.bz2 yosys-09b2264837bf0a2d7d2c9b35f88c2d5924fa4364.zip | |
Clean up manual casting.
Co-Authored-By: David Shah <dave@ds0.me>
| -rw-r--r-- | passes/sat/qbfsat.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/passes/sat/qbfsat.cc b/passes/sat/qbfsat.cc index d249c7dde..4c3e24505 100644 --- a/passes/sat/qbfsat.cc +++ b/passes/sat/qbfsat.cc @@ -137,7 +137,7 @@ void specialize_from_file(RTLIL::Module *module, const std::string &file) { RTLIL::Wire *wire = module->wire(hole_name); #ifndef NDEBUG log_assert(wire != nullptr); - log_assert(wire->width > 0 && hole_value.size() == static_cast<unsigned long>(wire->width)); + log_assert(wire->width > 0 && GetSize(hole_value) == wire->width); #endif log("Specializing %s from file with %s = %d'b%s.\n", module->name.c_str(), hole_name.c_str(), wire->width, hole_value.c_str()); @@ -165,7 +165,7 @@ void specialize(RTLIL::Module *module, const QbfSolutionType &sol) { RTLIL::Wire *wire = module->wire(hole_name); #ifndef NDEBUG log_assert(wire != nullptr); - log_assert(wire->width > 0 && hole_value.size() == static_cast<unsigned long>(wire->width)); + log_assert(wire->width > 0 && GetSize(hole_value) == wire->width); #endif log("Specializing %s with %s = %d'b%s.\n", module->name.c_str(), hole_name.c_str(), wire->width, hole_value.c_str()); |