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| author | Clifford Wolf <clifford@clifford.at> | 2018-10-05 09:26:10 +0200 |
|---|---|---|
| committer | Jim Lawson <ucbjrl@berkeley.edu> | 2018-10-08 11:38:10 -0700 |
| commit | 05e1c3906405a26a106d09be94c907ab507a0da6 (patch) | |
| tree | b98b85b432f3440aaadb033219db7b502a9c8b84 | |
| parent | 3661c27acda1b011f2e82c2656e3a701bb63ded6 (diff) | |
| download | yosys-05e1c3906405a26a106d09be94c907ab507a0da6.tar.gz yosys-05e1c3906405a26a106d09be94c907ab507a0da6.tar.bz2 yosys-05e1c3906405a26a106d09be94c907ab507a0da6.zip | |
Fix compiler warning in verific.cc
Signed-off-by: Clifford Wolf <clifford@clifford.at>
| -rw-r--r-- | frontends/verific/verific.cc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/frontends/verific/verific.cc b/frontends/verific/verific.cc index c5fa58313..06d98611a 100644 --- a/frontends/verific/verific.cc +++ b/frontends/verific/verific.cc @@ -1676,6 +1676,7 @@ YOSYS_NAMESPACE_END PRIVATE_NAMESPACE_BEGIN +#ifdef YOSYS_ENABLE_VERIFIC bool check_noverific_env() { const char *e = getenv("YOSYS_NOVERIFIC"); @@ -1685,6 +1686,7 @@ bool check_noverific_env() return false; return true; } +#endif struct VerificPass : public Pass { VerificPass() : Pass("verific", "load Verilog and VHDL designs using Verific") { } |