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* refactor: New NetInfo and CellInfo constructorsgatecat2022-02-162-16/+9
* archapi: Use arbitrary rather than actual placement in predictDelaygatecat2021-12-192-7/+8
* clangformat.William D. Jones2021-12-162-9/+12
* machxo2: Remove no-iobs option. It was always enabled and should remain an im...William D. Jones2021-12-166-8/+5
* machxo2: Remove -noiopad option when generating miters for post-pnr verificat...William D. Jones2021-12-161-1/+2
* machxo2: Add packing logic to forbid designs lacking FACADE_IO top-level ports.William D. Jones2021-12-161-0/+46
* machxo2: Correct which PIO wires get adjusted when writing text bitstream. Ad...William D. Jones2021-12-161-9/+26
* machxo2: Fix packing for directly-connected DFFs.William D. Jones2021-07-013-9/+28
* machxo2: Add VHDL primitives, demo, and script.William D. Jones2021-07-014-0/+81
* machxo2: Add a special case for pips whose config bits are in multipleWilliam D. Jones2021-07-011-0/+12
* machxo2: Hardcode a rule for emitting U_/D_ or G_ prefixes in ASCII output.William D. Jones2021-07-011-2/+17
* machxo2: Set Pip and Wire delays to reasonable fake values mirroringWilliam D. Jones2021-07-011-2/+2
* Fixing old emails and names in copyrightsgatecat2021-06-1213-15/+15
* Remove redundant code after hashlib movegatecat2021-06-021-43/+0
* Use hashlib in most remaining codegatecat2021-06-021-2/+2
* Using hashlib in archesgatecat2021-06-024-9/+8
* Use hashlib for core netlist structuresgatecat2021-06-023-17/+19
* Add hash() member functionsgatecat2021-06-021-0/+5
* Add stub cluster API impl for remaining archesgatecat2021-05-061-1/+3
* Add same fix as in issue #373Miodrag Milanovic2021-04-081-0/+4
* Split nextpnr.h to allow for linear inclusion.Keith Rothman2021-03-152-7/+18
* Fix compiler warnings introduced by -Wextragatecat2021-02-253-15/+1
* Replace DelayInfo with DelayPair/DelayQuadgatecat2021-02-192-36/+3
* Remove isValidBelForCellgatecat2021-02-163-12/+1
* machxo2: Misc tidying upgatecat2021-02-122-8/+4
* machxo2: Python bindings and stub GUIgatecat2021-02-125-6/+188
* machxo2: Use snake_case for non-ArchAPI functionsgatecat2021-02-124-63/+63
* machxo2: Use IdStringLists in earnestgatecat2021-02-122-76/+70
* machxo2: Update with Arch API changesgatecat2021-02-127-464/+115
* machxo2: Prepare README.md for first PR.William D. Jones2021-02-121-4/+36
* machxo2: Add prefix parameter to simtest.sh. Remove show command fromWilliam D. Jones2021-02-123-40/+43
* machxo2: Add prefix parameter to simple.sh. Update README.md.William D. Jones2021-02-122-14/+14
* machxo2: Fill in more about mitertest.sh in README.md and clean up a bit.William D. Jones2021-02-121-4/+27
* machxo2: Add two new examples: blinky_ext and aforementioned UART.William D. Jones2021-02-123-0/+238
* machxo2: auto-top does not work for smt miter either.William D. Jones2021-02-121-1/+1
* machxo2: Fix unhelpful comment in mitertest.sh.William D. Jones2021-02-121-1/+0
* machxo2: Verilog examples using OSCH cannot be simulated in mitertest.sh. Rem...William D. Jones2021-02-121-3/+7
* machxo2: Add prefix parameter to mitertest.sh. All Verilog files top modules ...William D. Jones2021-02-123-37/+37
* machxo2: Add prefix paramter to demo.sh.William D. Jones2021-02-124-22/+37
* Add demo with RGB LEDmtnrbq2021-02-122-0/+43
* machxo2: Fix packing when FF is driven by a constant; UART test core working ...William D. Jones2021-02-122-1/+3
* machxo2: Add packing logic to handle FFs fed with constant value; UART test c...William D. Jones2021-02-123-5/+39
* machxo2: Add additional packing phase to pack remaining FFs.William D. Jones2021-02-121-0/+38
* machxo2: Don't write out config bits for cells without location info.William D. Jones2021-02-121-1/+2
* machxo2: Special-case left and right I/O wire names in ASCII generation.William D. Jones2021-02-121-1/+35
* machxo2: Add quickstart README.md.William D. Jones2021-02-121-0/+73
* machxo2: Fail CMake configuration is BUILD_PYTHON is ON (not supported for now).William D. Jones2021-02-121-0/+3
* machxo2: Fix REGMODE identifier (per slice, not per-FF).William D. Jones2021-02-122-5/+2
* machxo2: Add demo.sh TinyFPGA Ax example.William D. Jones2021-02-124-1/+50
* machxo2: clang format.William D. Jones2021-02-124-29/+34