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* Use hashlib for core netlist structuresgatecat2021-06-021-31/+34
* Replace DelayInfo with DelayPair/DelayQuadgatecat2021-02-191-7/+7
* ice40: Use snake case for arch-specific functionsD. Shah2021-02-031-6/+6
* ice40: Implement IdStringList for all arch object namesD. Shah2021-02-021-14/+14
* refactor: Replace getXName().c_str(ctx) with ctx->nameOfXD. Shah2021-02-021-5/+4
* ice40: Switch from RelPtr to RelSliceD. Shah2021-01-271-8/+5
* ice40: Nicer error for unconstrained SB_GB_IODavid Shah2020-12-271-0/+2
* ice40: Clarify feedback paths in PLL constraints codeDavid Shah2020-12-031-3/+3
* ice40: Derive PLL timing constraintsDavid Shah2020-12-031-31/+138
* ice40/pack/SB_PLL: Force fixed value to 4'b1111 if dynamic delay is usedSylvain Munaut2020-11-101-7/+9
* ice40: If IO is used by SB_GB_IO, can't use it for PLLSylvain Munaut2020-07-091-1/+2
* ice40: Derive oscillator frequency constraintsDavid Shah2020-03-291-0/+40
* ice40: Always copy DFF attrs to LCDavid Shah2020-03-191-0/+5
* Preserve hierarchy through packingDavid Shah2019-12-271-0/+1
* frontend/generic: Fix regressionsDavid Shah2019-12-271-1/+3
* ice40: Preserve top level IO properlyDavid Shah2019-10-191-13/+3
* ice40: Add support for PLL DELAY_ADJUSTMENT_MODEDavid Shah2019-09-231-1/+15
* ice40: Move clock constraints across SB_IO and SB_GB_IODavid Shah2019-09-131-0/+20
* ice40: Add better stats on LC packingDavid Shah2019-08-081-1/+11
* ice40: Fix regressionDavid Shah2019-08-051-1/+3
* Major Property improvements for common and iCE40David Shah2019-08-051-29/+31
* clangformat runMiodrag Milanovic2019-06-251-17/+15
* Merge masterMiodrag Milanovic2019-06-251-4/+33
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| * clangformatDavid Shah2019-06-241-3/+5
| * ice40: add RGB_DRV/LED_DRV_CUR support for u4kSimon Schubert2019-06-101-4/+31
* | Use flags for each stepMiodrag Milanovic2019-06-141-1/+1
* | Save top level attrs and store current stepMiodrag Milanovic2019-06-071-0/+1
* | Add vcc and gnd nets and cells only if neededMiodrag Milanovic2019-06-071-5/+20
* | WIP saving/loading attributesMiodrag Milanovic2019-06-071-0/+1
* | Revert "Do not add VCC if not used, loading json works"Miodrag Milanovic2019-06-021-6/+5
* | Added support for attributes/properties typesMiodrag Milanovic2019-06-011-1/+1
* | Do not add VCC if not used, loading json worksMiodrag Milanovic2019-05-311-5/+6
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* ice40: Add support for HFOSC trimmingSylvain Munaut2019-05-131-0/+5
* ice40: Only create padin gbuf for PLLs if global output actually usedSylvain Munaut2019-04-171-11/+38
* ice40: Take placed SB_GBs into account when placing PLLsSylvain Munaut2019-04-161-9/+55
* ice40/pack: During IO packing, remove any unused input connectionSylvain Munaut2019-04-111-0/+13
* ice40: Don't constrain to a PLL bel that has already been usedDavid Shah2019-04-011-0/+2
* ice40: Add support for SB_I2C and SB_SPISylvain Munaut2019-03-251-1/+18
* ice40: PLLs can't conflict with themselvesDavid Shah2019-02-091-0/+2
* ice40: Don't create PLLOUT_B buffer for single-output PLL variantsDavid Shah2019-02-091-1/+6
* Merge pull request #211 from smunaut/ice40_ram_attrsDavid Shah2019-01-211-0/+4
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| * ice40/pack: Copy attributes to packed RAM cellsSylvain Munaut2019-01-191-0/+4
* | ice40: Add error message if a selected site is not Global Buffer capableSylvain Munaut2019-01-181-0/+4
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* ice40: Improve handling of unconstrained IODavid Shah2018-12-261-3/+0
* ice40: Fix LOCK feedthrough insertion with carry or >8 LUTsDavid Shah2018-12-201-4/+10
* ice40: Report error for unsupported PLL FEEDBACK_PATH valuesDavid Shah2018-12-061-7/+11
* ice40: add reset global promotion threshold.whitequark2018-12-041-1/+3
* ice40: Add support for placing SB_LEDDA_IP block.Daniel Serpell2018-12-011-0/+4
* ice40: Add a warning for unconstrained IODavid Shah2018-11-291-6/+5
* Merge pull request #157 from whitequark/fanout-threshDavid Shah2018-11-291-1/+1
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