Commit message (Collapse) | Author | Age | Files | Lines | |
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* | clangformat | Clifford Wolf | 2018-11-11 | 1 | -4/+1 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Add getConflictingWireWire() arch API, streamline getConflictingXY semantic | Clifford Wolf | 2018-11-11 | 1 | -14/+29 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Add getConflictingPipWire() arch API, router1 improvements | Clifford Wolf | 2018-11-11 | 1 | -9/+17 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | clangformat | David Shah | 2018-09-30 | 1 | -1/+1 |
| | | | | Signed-off-by: David Shah <davey1576@gmail.com> | ||||
* | Add iCE40 gfx for span-4 wires between IO tiles | Clifford Wolf | 2018-08-19 | 1 | -2/+0 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Merge pull request #47 from YosysHQ/settings_propagate | Clifford Wolf | 2018-08-18 | 1 | -2/+0 |
|\ | | | | | Use settings for placer1 and router1 | ||||
| * | Use settings for placer1 and router1 | Miodrag Milanovic | 2018-08-09 | 1 | -2/+0 |
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* | | Improve iCE40 gfx for IO tiles and RAM tiles | Clifford Wolf | 2018-08-18 | 1 | -0/+2 |
| | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | | Add ice40 wire attributes (grid position, segment list) | Clifford Wolf | 2018-08-18 | 1 | -18/+5 |
| | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | | Add Arch attrs API | Clifford Wolf | 2018-08-14 | 1 | -0/+18 |
| | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | | Merge remote-tracking branch 'origin/master' into placer_speedup | Eddie Hung | 2018-08-10 | 1 | -1/+11 |
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| * | Add pip locations | Clifford Wolf | 2018-08-09 | 1 | -1/+11 |
| | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | | Rework Arch::logicCellsCompatible() to take pointer + size, allowing use of ↵ | Eddie Hung | 2018-08-10 | 1 | -1/+1 |
|/ | | | | std::array | ||||
* | Merge branch 'master' of github.com:YosysHQ/nextpnr into constids | Clifford Wolf | 2018-08-08 | 1 | -10/+11 |
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| * | Merge pull request #44 from YosysHQ/improve_timing_spec | David Shah | 2018-08-08 | 1 | -10/+10 |
| |\ | | | | | | | Speed up budget allocator using topographical ordering and update cell timing API | ||||
| | * | Arch API: Removing Arch::isIOCell | David Shah | 2018-08-08 | 1 | -2/+0 |
| | | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com> | ||||
| | * | Arch API: New specification for timing port classes | David Shah | 2018-08-08 | 1 | -4/+2 |
| | | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com> | ||||
| | * | clangformat | Eddie Hung | 2018-08-06 | 1 | -6/+8 |
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| | * | Add new Arch::isIOCell() API function | Eddie Hung | 2018-08-06 | 1 | -0/+2 |
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| | * | Change getBudgetOverride() signature to return bool and modify budget in place | Eddie Hung | 2018-08-05 | 1 | -1/+1 |
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| * | | Merge remote-tracking branch 'origin/master' into common_main | Miodrag Milanovic | 2018-08-08 | 1 | -47/+46 |
| |\ \ | | | | | | | | | | | | | | | | | | | | | # Conflicts: # ecp5/main.cc # ice40/main.cc | ||||
| * | | | Added project loader | Miodrag Milanovic | 2018-08-06 | 1 | -0/+1 |
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* | | | | Get rid of old iCE40 id_ Arch members | Clifford Wolf | 2018-08-08 | 1 | -10/+1 |
| | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | | | | Get rid of PortPin and BelType (ice40, generic, docs) | Clifford Wolf | 2018-08-08 | 1 | -19/+13 |
| |/ / |/| | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | | | Change getBudgetOverride() signature to return bool and modify budget in place | Eddie Hung | 2018-08-06 | 1 | -1/+1 |
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* | | API change: Use CellInfo* and NetInfo* as cell/net handles (common, ice40) | Clifford Wolf | 2018-08-05 | 1 | -46/+45 |
|/ | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | clangformat | Clifford Wolf | 2018-08-05 | 1 | -12/+12 |
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* | Add new iCE40 delay estimator and delay predictor | Clifford Wolf | 2018-08-04 | 1 | -2/+1 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Refactor ice40 timing fuzzer used to create delay estimates | Clifford Wolf | 2018-08-04 | 1 | -0/+2 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Merge branch 'master' of github.com:YosysHQ/nextpnr into lutperm | Clifford Wolf | 2018-08-04 | 1 | -0/+2 |
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| * | clangformat | David Shah | 2018-08-04 | 1 | -1/+0 |
| | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com> | ||||
| * | Add constraint weight as a command line option | David Shah | 2018-08-03 | 1 | -0/+3 |
| | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com> | ||||
* | | Proper ice40 wire types | Clifford Wolf | 2018-08-03 | 1 | -1/+20 |
| | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | | Add iCE40 pseudo-pips for lut permutation | Clifford Wolf | 2018-08-03 | 1 | -8/+30 |
|/ | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Merge pull request #22 from YosysHQ/routethru | Clifford Wolf | 2018-08-03 | 1 | -1/+11 |
|\ | | | | | Add iCE40 LUT route-through pips | ||||
| * | Add LUT route-through pips to iCE40 architecture database | Clifford Wolf | 2018-08-02 | 1 | -1/+11 |
| | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | | ice40: Use real cell timings | David Shah | 2018-08-02 | 1 | -1/+1 |
| | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com> | ||||
* | | ice40: Adding cell timings to chipdb | David Shah | 2018-08-02 | 1 | -0/+15 |
|/ | | | | Signed-off-by: David Shah <davey1576@gmail.com> | ||||
* | Remove getFrameDecal() API | Clifford Wolf | 2018-08-01 | 1 | -1/+0 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Merge branch 'redist_slack' into 'master' | David Shah | 2018-08-01 | 1 | -0/+2 |
|\ | | | | | | | | | Update budgets throughout placement and routing See merge request SymbioticEDA/nextpnr!16 | ||||
| * | Modify the getNetinfo*() functions and getBudgetOverride() to not use | Eddie Hung | 2018-07-31 | 1 | -1/+1 |
| | | | | | | | | user_idx and to take a PortRef& instead | ||||
| * | Merge remote-tracking branch 'origin/estdelay' into redist_slack | Eddie Hung | 2018-07-31 | 1 | -0/+1 |
| |\ | | | | | | | | | | | | | | | | | | | Conflicts: ecp5/arch.cc generic/arch.cc ice40/arch.cc | ||||
| | * | Modify predictDelay signature | Eddie Hung | 2018-07-30 | 1 | -1/+1 |
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| | * | Add predictDelay Arch API | Clifford Wolf | 2018-07-30 | 1 | -0/+1 |
| | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | Merge branch 'redist_slack' into 'redist_slack' | Eddie Hung | 2018-07-31 | 1 | -0/+1 |
| |\ \ | | | | | | | | | | | | | # Conflicts: # common/timing.cc | ||||
| | * | | getBudgetOverride() now handles COUT crossing tiles | Eddie Hung | 2018-07-26 | 1 | -1/+1 |
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| | * | | Revert "Remove Arch::getBudgetOverride()" | Eddie Hung | 2018-07-26 | 1 | -0/+1 |
| | |/ | | | | | | | | | | This reverts commit 749dae4ae5b2b719237af5db28e98ff671bae265. | ||||
* | / | clangformat | Sergiusz Bazanski | 2018-08-01 | 1 | -2/+2 |
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* | | getChipName() should be const | Clifford Wolf | 2018-07-31 | 1 | -1/+1 |
| | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | | Add binary search to getBelPinWire() and getBelPinType() | Clifford Wolf | 2018-07-31 | 1 | -1/+1 |
| | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> |