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* ice40: Merge driving LUT<=2s into carry-only LCsgatecat2022-03-291-3/+26
* refactor: New member functions to replace design_utilsgatecat2022-02-181-7/+7
* refactor: Use constids instead of id("..")gatecat2022-02-161-45/+45
* Fixing old emails and names in copyrightsgatecat2021-06-121-2/+2
* Replace DelayInfo with DelayPair/DelayQuadgatecat2021-02-191-26/+26
* Merge pull request #568 from YosysHQ/dave/arch-overridegatecat2021-02-081-12/+2
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| * ice40: Switch to BaseArchD. Shah2021-02-051-12/+2
* | Use RelSlice::ssize instead of cast-to-int throughoutD. Shah2021-02-081-3/+3
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* Mark IdString and IdStringList single argument constructors explicit.Keith Rothman2021-02-041-1/+1
* ice40: Use snake case for arch-specific functionsD. Shah2021-02-031-13/+13
* ice40: Implement IdStringList for all arch object namesD. Shah2021-02-021-20/+35
* Run "make clangformat".Keith Rothman2021-02-021-2/+2
* Rename Partition -> BelBucket.Keith Rothman2021-02-021-3/+3
* Add Partition APIs to ice40, nexus, gowin archs.Keith Rothman2021-02-021-0/+13
* cleanup: Remove dead/unused codeD. Shah2021-01-281-32/+0
* ice40: Switch from RelPtr to RelSliceD. Shah2021-01-271-38/+33
* Fixes for new part typesMiodrag Milanovic2020-07-081-3/+11
* Use proper names in GUIMiodrag Milanovic2020-07-081-12/+12
* Support rest of partsMiodrag Milanovic2020-07-081-11/+22
* Adding LP4K as wellMiodrag Milanovic2020-07-081-3/+7
* Support 4K parts directlyMiodrag Milanovic2020-07-081-5/+22
* ice40: Fix getBelsByTileDavid Shah2020-06-291-1/+5
* Fix clangformat and execute itMiodrag Milanovic2020-06-271-6/+4
* Simplify and improve chipdb embedding/loading.whitequark2020-06-261-71/+35
* CMake: rewrite chipdb handling from ground up.whitequark2020-06-251-2/+2
* Port nextpnr-{ice40,ecp5} to WASI.whitequark2020-05-231-2/+2
* ice40: Fix output register timing analysis for registered output enableSylvain Munaut2020-03-291-1/+1
* router2: Improve flow and log outputDavid Shah2020-02-031-1/+1
* ice40: Implement getRouteBoundingBox for router2David Shah2020-02-031-0/+24
* Allow selection of router algorithmDavid Shah2020-02-031-2/+15
* ice40: Make HeAP the default placerDavid Shah2019-11-261-0/+4
* Major Property improvements for common and iCE40David Shah2019-08-051-2/+2
* clangformat runMiodrag Milanovic2019-06-251-2/+3
* Merge masterMiodrag Milanovic2019-06-251-0/+8
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| * ice40: add RGB_DRV/LED_DRV_CUR support for u4kSimon Schubert2019-06-101-0/+8
* | Use flags for each stepMiodrag Milanovic2019-06-141-2/+2
* | Save top level attrs and store current stepMiodrag Milanovic2019-06-071-0/+2
* | CleanupMiodrag Milanovic2019-06-071-11/+0
* | WIP saving/loading attributesMiodrag Milanovic2019-06-071-4/+20
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* ice40: In assignCellInfo get PIN_TYPE/NEG_TRIGGER from params and not attrsSylvain Munaut2019-04-171-2/+2
* ice40: Add support for SB_I2C and SB_SPISylvain Munaut2019-03-251-0/+21
* Add --placer option and refactor placer selectionDavid Shah2019-03-241-2/+13
* HeAP: Add PlacerHeapCfgDavid Shah2019-03-221-1/+3
* HeAP: Make HeAP placer optionalDavid Shah2019-03-221-4/+7
* HeAP: Add TAUCS wrapper and integrationDavid Shah2019-03-221-2/+4
* ice40: Fix u4k in external chipdb mode.Marcin Kościelnicki2019-03-191-3/+3
* ice40: support u4kSimon Schubert2019-02-231-2/+12
* ice40: Fix timing class of 'padin' GB outputsDavid Shah2019-02-201-1/+1
* Load chipdb from filesystem as optionMiodrag Milanovic2019-02-091-1/+30
* Merge pull request #220 from YosysHQ/coi3Eddie Hung2019-01-291-6/+9
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