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authorSylvain Munaut <tnt@246tNt.com>2019-03-22 23:29:34 +0100
committerSylvain Munaut <tnt@246tNt.com>2019-03-25 23:48:59 +0100
commitd401e3e1a09e2e5d78f18f32405c82293ce68545 (patch)
treefe46510d61a491a9d1b85ffba102e0eb9c69b8c2 /ice40/arch.cc
parentc2d87846d8e6c9603f432c1b021f58023f7625b4 (diff)
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ice40: Add support for SB_I2C and SB_SPI
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Diffstat (limited to 'ice40/arch.cc')
-rw-r--r--ice40/arch.cc21
1 files changed, 21 insertions, 0 deletions
diff --git a/ice40/arch.cc b/ice40/arch.cc
index b0839fa5..bfcadc0b 100644
--- a/ice40/arch.cc
+++ b/ice40/arch.cc
@@ -1053,6 +1053,16 @@ TimingPortClass Arch::getPortTimingClass(const CellInfo *cell, IdString port, in
if (port == id_CLK || port == id_CLOCK)
return TMG_CLOCK_INPUT;
return TMG_IGNORE;
+ } else if (cell->type == id_SB_I2C || cell->type == id_SB_SPI) {
+ if (port == this->id("SBCLKI"))
+ return TMG_CLOCK_INPUT;
+
+ clockInfoCount = 1;
+
+ if (cell->ports.at(port).type == PORT_OUT)
+ return TMG_REGISTER_OUTPUT;
+ else
+ return TMG_REGISTER_INPUT;
}
log_error("cell type '%s' is unsupported (instantiated as '%s')\n", cell->type.c_str(this), cell->name.c_str(this));
}
@@ -1144,6 +1154,17 @@ TimingClockingInfo Arch::getPortClockingInfo(const CellInfo *cell, IdString port
info.setup.delay = 100;
info.hold.delay = 0;
}
+ } else if (cell->type == id_SB_I2C || cell->type == id_SB_SPI) {
+ info.clock_port = this->id("SBCLKI");
+ info.edge = RISING_EDGE;
+ if (cell->ports.at(port).type == PORT_OUT) {
+ /* Dummy number */
+ info.clockToQ.delay = 1500;
+ } else {
+ /* Dummy number */
+ info.setup.delay = 1500;
+ info.hold.delay = 0;
+ }
} else {
NPNR_ASSERT_FALSE("unhandled cell type in getPortClockingInfo");
}