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* Remove wire alias APIDavid Shah2020-10-153-26/+2
| | | | | | It has not actually been implemented in any router for over 2.5 years and causes nothing more than confusion. It can always be added back if it forms part of a future solution; possibly as part of a more general database structure rethink. Signed-off-by: David Shah <dave@ds0.me>
* Update generic synth script for dfflegalize changesPepijn de Vos2020-09-181-0/+1
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* clangformatMiodrag Milanovic2020-07-251-26/+26
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* proper argument propagationMiodrag Milanovic2020-07-241-26/+28
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* Initial conversion to pybind11Miodrag Milanovic2020-07-231-35/+35
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* Fix spelling of 'unsupported'Nathaniel Graff2020-05-131-1/+1
| | | | Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
* Merge pull request #391 from YosysHQ/router2-upstreamDavid Shah2020-02-042-2/+44
|\ | | | | Upstreaming router2
| * generic: Implement getRouteBoundingBoxDavid Shah2020-02-032-0/+26
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
| * router2: Improve flow and log outputDavid Shah2020-02-031-1/+1
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
| * Allow selection of router algorithmDavid Shah2020-02-032-2/+18
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | Merge pull request #385 from YosysHQ/router1-arc-fixesDavid Shah2020-02-031-1/+2
|\ \ | |/ |/| Fixes for partial reconfig demo
| * Fix latent bug in generic out-of-context IO modeDavid Shah2020-01-211-1/+2
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | clangformatDavid Shah2020-01-201-1/+0
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | Various warning fixesMiodrag Milanovic2020-01-181-11/+0
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* python: Add bindings for hierarchy structuresDavid Shah2019-12-271-0/+2
| | | | Signed-off-by: David Shah <dave@ds0.me>
* generic: Fix width of 0-driver INITDavid Shah2019-12-011-1/+1
| | | | Signed-off-by: David Shah <dave@ds0.me>
* generic: Don't assume unused LUT inputs are zeroDavid Shah2019-12-012-2/+5
| | | | Signed-off-by: David Shah <dave@ds0.me>
* generic: Add support for post-PnR simulationDavid Shah2019-11-275-7/+67
| | | | Signed-off-by: David Shah <dave@ds0.me>
* generic: Add support for disabling IOB insertionDavid Shah2019-11-272-1/+9
| | | | Signed-off-by: David Shah <dave@ds0.me>
* generic: Improve error handling when Wire/Pip/Bel is not foundDavid Shah2019-11-272-21/+50
| | | | Signed-off-by: David Shah <dave@ds0.me>
* generic: Use HeAP as placer where possibleDavid Shah2019-11-261-3/+33
| | | | Signed-off-by: David Shah <dave@ds0.me>
* clangformatDavid Shah2019-11-181-1/+1
| | | | Signed-off-by: David Shah <dave@ds0.me>
* leftover Q from before slice api changePepijn de Vos2019-11-181-4/+4
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* more formattingPepijn de Vos2019-11-081-2/+2
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* return FF_USED, formatting, correct INITPepijn de Vos2019-11-083-5/+17
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* dedicated output for LUT in GENERIC_SLICEPepijn de Vos2019-11-086-32/+31
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* generic: New Property interfaceDavid Shah2019-08-056-22/+21
| | | | Signed-off-by: David Shah <dave@ds0.me>
* clangformat runMiodrag Milanovic2019-06-252-5/+6
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* enable lading of jsons and setting up contextMiodrag Milanovic2019-06-141-0/+1
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* Use flags for each stepMiodrag Milanovic2019-06-142-3/+3
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* restore arch info for ecp5Miodrag Milanovic2019-06-141-0/+5
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* Load properties from json and propagate to context createMiodrag Milanovic2019-06-131-2/+2
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* Remove concept of project and code connectedMiodrag Milanovic2019-06-131-37/+0
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* Save top level attrs and store current stepMiodrag Milanovic2019-06-072-2/+11
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* CleanupMiodrag Milanovic2019-06-072-13/+0
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* WIP saving/loading attributesMiodrag Milanovic2019-06-072-0/+13
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* ci: Run generic example simple.shDavid Shah2019-04-171-2/+2
| | | | Signed-off-by: David Shah <dave@ds0.me>
* pybindings: make errors in Python scripts stop nextpnr executionDavid Shah2019-04-171-1/+1
| | | | Signed-off-by: David Shah <dave@ds0.me>
* generic/examples: Add FASM writer Python scriptDavid Shah2019-04-179-38/+92
| | | | Signed-off-by: David Shah <dave@ds0.me>
* generic: Fix predictDelayDavid Shah2019-04-041-2/+2
| | | | Signed-off-by: David Shah <dave@ds0.me>
* generic: Router param tweaksDavid Shah2019-04-041-2/+2
| | | | Signed-off-by: David Shah <dave@ds0.me>
* generic: Cell timing supportDavid Shah2019-04-046-9/+129
| | | | Signed-off-by: David Shah <dave@ds0.me>
* generic: Improve exampleDavid Shah2019-04-042-17/+17
| | | | Signed-off-by: David Shah <dave@ds0.me>
* generic: GUI Python bindingsDavid Shah2019-04-033-7/+34
| | | | Signed-off-by: David Shah <dave@ds0.me>
* generic: Add a few more bindingsDavid Shah2019-04-021-0/+5
| | | | Signed-off-by: David Shah <dave@ds0.me>
* generic: Simple working exampleDavid Shah2019-04-0210-18/+41
| | | | Signed-off-by: David Shah <dave@ds0.me>
* generic: Simple procedural example worksDavid Shah2019-04-024-7/+87
| | | | Signed-off-by: David Shah <dave@ds0.me>
* generic: Add a simple packer for generic SLICEs and IOBsDavid Shah2019-04-027-6/+597
| | | | Signed-off-by: David Shah <dave@ds0.me>
* generic: Add synth_generic.tclDavid Shah2019-04-023-3/+34
| | | | Signed-off-by: David Shah <dave@ds0.me>
* generic: Add simple primitive libraryDavid Shah2019-04-022-0/+71
| | | | Signed-off-by: David Shah <dave@ds0.me>
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