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* dedicated output for LUT in GENERIC_SLICEPepijn de Vos2019-11-086-32/+31
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* generic: New Property interfaceDavid Shah2019-08-056-22/+21
| | | | Signed-off-by: David Shah <dave@ds0.me>
* clangformat runMiodrag Milanovic2019-06-252-5/+6
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* enable lading of jsons and setting up contextMiodrag Milanovic2019-06-141-0/+1
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* Use flags for each stepMiodrag Milanovic2019-06-142-3/+3
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* restore arch info for ecp5Miodrag Milanovic2019-06-141-0/+5
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* Load properties from json and propagate to context createMiodrag Milanovic2019-06-131-2/+2
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* Remove concept of project and code connectedMiodrag Milanovic2019-06-131-37/+0
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* Save top level attrs and store current stepMiodrag Milanovic2019-06-072-2/+11
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* CleanupMiodrag Milanovic2019-06-072-13/+0
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* WIP saving/loading attributesMiodrag Milanovic2019-06-072-0/+13
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* ci: Run generic example simple.shDavid Shah2019-04-171-2/+2
| | | | Signed-off-by: David Shah <dave@ds0.me>
* pybindings: make errors in Python scripts stop nextpnr executionDavid Shah2019-04-171-1/+1
| | | | Signed-off-by: David Shah <dave@ds0.me>
* generic/examples: Add FASM writer Python scriptDavid Shah2019-04-179-38/+92
| | | | Signed-off-by: David Shah <dave@ds0.me>
* generic: Fix predictDelayDavid Shah2019-04-041-2/+2
| | | | Signed-off-by: David Shah <dave@ds0.me>
* generic: Router param tweaksDavid Shah2019-04-041-2/+2
| | | | Signed-off-by: David Shah <dave@ds0.me>
* generic: Cell timing supportDavid Shah2019-04-046-9/+129
| | | | Signed-off-by: David Shah <dave@ds0.me>
* generic: Improve exampleDavid Shah2019-04-042-17/+17
| | | | Signed-off-by: David Shah <dave@ds0.me>
* generic: GUI Python bindingsDavid Shah2019-04-033-7/+34
| | | | Signed-off-by: David Shah <dave@ds0.me>
* generic: Add a few more bindingsDavid Shah2019-04-021-0/+5
| | | | Signed-off-by: David Shah <dave@ds0.me>
* generic: Simple working exampleDavid Shah2019-04-0210-18/+41
| | | | Signed-off-by: David Shah <dave@ds0.me>
* generic: Simple procedural example worksDavid Shah2019-04-024-7/+87
| | | | Signed-off-by: David Shah <dave@ds0.me>
* generic: Add a simple packer for generic SLICEs and IOBsDavid Shah2019-04-027-6/+597
| | | | Signed-off-by: David Shah <dave@ds0.me>
* generic: Add synth_generic.tclDavid Shah2019-04-023-3/+34
| | | | Signed-off-by: David Shah <dave@ds0.me>
* generic: Add simple primitive libraryDavid Shah2019-04-022-0/+71
| | | | Signed-off-by: David Shah <dave@ds0.me>
* generic: Place a single SLICEDavid Shah2019-04-023-4/+24
| | | | Signed-off-by: David Shah <dave@ds0.me>
* generic: Python bindings for arch constructionDavid Shah2019-04-021-0/+56
| | | | Signed-off-by: David Shah <dave@ds0.me>
* python: Named argument supportDavid Shah2019-04-021-0/+1
| | | | Signed-off-by: David Shah <dave@ds0.me>
* python: Infrastructure for generic arch Python APIDavid Shah2019-04-021-0/+91
| | | | Signed-off-by: David Shah <dave@ds0.me>
* Add --placer option and refactor placer selectionDavid Shah2019-03-242-1/+17
| | | | Signed-off-by: David Shah <dave@ds0.me>
* Merge remote-tracking branch 'origin/master' into timingapiEddie Hung2018-11-133-1/+5
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| * Merge pull request #107 from YosysHQ/router_improveEddie Hung2018-11-132-0/+4
| |\ | | | | | | Major rewrite of "router1"
| | * Add getConflictingWireWire() arch API, streamline getConflictingXY semanticClifford Wolf2018-11-111-1/+2
| | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| | * Add getConflictingPipWire() arch API, router1 improvementsClifford Wolf2018-11-112-0/+3
| | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * | Mark getArchOptions as override in derived classesPedro Vanzella2018-11-131-1/+1
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* / generic: Update arch to new timing APIDavid Shah2018-11-122-3/+18
|/ | | | Signed-off-by: David Shah <dave@ds0.me>
* clangformatDavid Shah2018-09-301-12/+3
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* Merge pull request #47 from YosysHQ/settings_propagateClifford Wolf2018-08-181-2/+2
|\ | | | | Use settings for placer1 and router1
| * Use settings for placer1 and router1Miodrag Milanovic2018-08-091-2/+2
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* | Add Arch attrs APIClifford Wolf2018-08-142-0/+31
|/ | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Merge pull request #42 from YosysHQ/floorplanDavid Shah2018-08-092-9/+26
|\ | | | | Add basic data structures for floorplanning
| * Add pip locationsClifford Wolf2018-08-092-9/+26
| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | Use settings for json and pcfMiodrag Milanovic2018-08-081-1/+1
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* Merge branch 'master' of github.com:YosysHQ/nextpnr into constidsClifford Wolf2018-08-084-112/+77
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| * Merge pull request #44 from YosysHQ/improve_timing_specDavid Shah2018-08-082-5/+7
| |\ | | | | | | Speed up budget allocator using topographical ordering and update cell timing API
| | * Arch API: Removing Arch::isIOCellDavid Shah2018-08-081-2/+0
| | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| | * Arch API: New specification for timing port classesDavid Shah2018-08-082-5/+7
| | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| | * Add Arch::isIOCell() to ecp5 and genericEddie Hung2018-08-061-0/+2
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| | * Modify getBudgetOverride for generic and ecp5 tooEddie Hung2018-08-052-2/+2
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| * | clangformatMiodrag Milanovic2018-08-081-8/+4
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