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fpga_interchange
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Author
Age
Files
Lines
*
Change CellInfo in getBelPinsForCellPin to be const.
Keith Rothman
2021-02-23
1
-1
/
+1
*
Replace DelayInfo with DelayPair/DelayQuad
gatecat
2021-02-19
3
-36
/
+5
*
Fix sign mismatch.
Keith Rothman
2021-02-18
2
-2
/
+2
*
Do some spell checking on site_router.cc
Keith Rothman
2021-02-18
1
-18
/
+18
*
Add some utility methods for site instance access.
Keith Rothman
2021-02-18
3
-13
/
+42
*
Update README's with latest instructions and features.
Keith Rothman
2021-02-18
3
-20
/
+94
*
Add utility targets for getting plain text outputs.
Keith Rothman
2021-02-17
1
-1
/
+5
*
Add IOSTANDARD to ports.
Keith Rothman
2021-02-17
1
-1
/
+3
*
Emit fixed attributes to output physical netlist.
Keith Rothman
2021-02-17
1
-8
/
+19
*
Refactor "get only from iterator" to a utility.
Keith Rothman
2021-02-17
3
-12
/
+9
*
Keep all build artifacts under create_bba/build.
Keith Rothman
2021-02-17
2
-4
/
+5
*
Change how package pin IO sites are selected.
Keith Rothman
2021-02-17
3
-16
/
+52
*
Change makefiles to build a FPGA interchange BBA.
Keith Rothman
2021-02-17
4
-16
/
+106
*
Add examples invoking FPGA interchange nextpnr.
Keith Rothman
2021-02-17
11
-0
/
+152
*
Continue fixes.
Keith Rothman
2021-02-17
5
-23
/
+93
*
Disable traversal limit when reading logical netlist.
Keith Rothman
2021-02-17
1
-1
/
+3
*
Add initial site router.
Keith Rothman
2021-02-17
4
-6
/
+813
*
Working on standing up initial constraints system.
Keith Rothman
2021-02-17
3
-25
/
+468
*
clangformat
gatecat
2021-02-17
1
-3
/
+4
*
Merge pull request #586 from litghost/add_cell_bel_mapping_only
gatecat
2021-02-17
2
-13
/
+274
|
\
|
*
Require `--package` when arch BBA contains multiple packages.
Keith Rothman
2021-02-16
1
-3
/
+11
|
*
[FPGA Interchange] Add Cell -> BEL Pin maps.
Keith Rothman
2021-02-16
2
-13
/
+266
*
|
Remove isValidBelForCell
gatecat
2021-02-16
2
-14
/
+0
|
/
*
Move CMake logic into fpga-interchange-schema.
Keith Rothman
2021-02-15
1
-13
/
+1
*
Small fixes from review.
Keith Rothman
2021-02-15
1
-1
/
+1
*
Add FPGA interchange frontend and backend.
Keith Rothman
2021-02-15
6
-4
/
+914
*
Merge pull request #575 from YosysHQ/gatecat/belpin-2
gatecat
2021-02-15
1
-0
/
+3
|
\
|
*
Add getBelPinsForCellPin to Arch API
gatecat
2021-02-10
1
-0
/
+3
*
|
Run "make clangformat".
Keith Rothman
2021-02-12
4
-66
/
+53
*
|
Remove capnp and libz for XDC parser PR.
Keith Rothman
2021-02-12
1
-4
/
+0
*
|
Refactor XDC parser into a little class for testing purposes.
Keith Rothman
2021-02-12
3
-14
/
+52
*
|
Add unknown handles to convert [0] to "[0]".
Keith Rothman
2021-02-12
1
-0
/
+11
*
|
Add FPGA interchange XDC parser.
Keith Rothman
2021-02-12
5
-3
/
+204
*
|
Add getBelHidden and add some missing "override" statements.
Keith Rothman
2021-02-11
1
-2
/
+1
|
/
*
interchange: Base on ArchAPI
D. Shah
2021-02-08
2
-106
/
+135
*
Add RelSlice::ssize and use it when comparing with signed ints.
Keith Rothman
2021-02-05
2
-27
/
+28
*
Move all string data into BBA file.
Keith Rothman
2021-02-05
4
-48901
/
+15
*
Use RelSlice instead of RelPtr in cases where sizes are present.
Keith Rothman
2021-02-04
2
-97
/
+67
*
Update APIs to conform to style guide.
Keith Rothman
2021-02-04
5
-67
/
+48939
*
Remove unused method getReservedWireNet.
Keith Rothman
2021-02-04
1
-7
/
+0
*
Update copywrite headers.
Keith Rothman
2021-02-04
6
-4
/
+10
*
Correct some typos.
Keith Rothman
2021-02-04
1
-4
/
+4
*
Fix warnings with signed/unsigned.
Keith Rothman
2021-02-04
1
-1
/
+1
*
Fix fpga_interchange/README.md duplicate patch statement.
Keith Rothman
2021-02-04
1
-8
/
+0
*
Fix URLs in Markdown.
Keith Rothman
2021-02-04
1
-2
/
+2
*
Add empty constids.inc for build.
Keith Rothman
2021-02-04
1
-0
/
+0
*
Run "make clangformat".
Keith Rothman
2021-02-04
4
-148
/
+100
*
Add README about initial state of FPGA interchange implementation.
Keith Rothman
2021-02-04
1
-0
/
+170
*
Update FPGA interchange to use IdStringList.
Keith Rothman
2021-02-04
2
-132
/
+137
*
Start adding data for placement constraint solving.
Keith Rothman
2021-02-04
2
-50
/
+43
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