iCE40/nextpnr - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	refactor: ArcBounds -> BoundingBox	gatecat	2022-12-07	1	-2/+2
\| \| \| \|	Signed-off-by: gatecat <gatecat@ds0.me>
*	Using hashlib in arches	gatecat	2021-06-02	1	-1/+1
\| \| \| \|	Signed-off-by: gatecat <gatecat@ds0.me>
*	Hash table refactoring	gatecat	2021-04-14	1	-1/+1
\| \| \| \|	Signed-off-by: gatecat <gatecat@ds0.me>
*	Initial lookahead for FPGA interchange.	Keith Rothman	2021-03-23	1	-0/+400
	Currently the lookahead is disabled by default because of the time to compute and RAM usage. However it does appear to work reasonably well in testing. Further effort is required to lower RAM usage after initial computation, and explore trade-off for cheaper time to compute. Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>