aboutsummaryrefslogtreecommitdiffstats
path: root/ecp5
Commit message (Expand)AuthorAgeFilesLines
* ecp5: Add Bel graphicsDavid Shah2018-07-314-12/+103
* Use DelayInfo for cell timing instead of delay_tDavid Shah2018-07-302-2/+2
* ecp5: Fix typoDavid Shah2018-07-271-1/+1
* ecp5: Fix chipdb builderDavid Shah2018-07-271-1/+2
* Fix name clash for ecp5Miodrag Milanovic2018-07-262-2/+2
* Add getWireType()/getPipType() APIClifford Wolf2018-07-261-0/+4
* clangformatEddie Hung2018-07-251-6/+4
* clangformatDavid Shah2018-07-252-3/+4
* ecp5: Add global network info to databaseDavid Shah2018-07-252-0/+39
* Fixed packing non podMiodrag Milanovic2018-07-252-5/+5
* ecp5: Update trellis_import to use new bbasmDavid Shah2018-07-252-293/+58
* ecp5: Bitsream gen tuningDavid Shah2018-07-241-11/+16
* Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnrDavid Shah2018-07-241-3/+122
|\
| * Fixed pybiding so generic can work and ecp5 expose all neededMiodrag Milanovic2018-07-241-3/+122
* | ecp5: Working on LVDS inputs for Versa supportDavid Shah2018-07-241-0/+8
|/
* ecp5: Architecture testing and fixingDavid Shah2018-07-242-1/+11
* Remove implementations of deprecated APIsDavid Shah2018-07-243-39/+9
* ecp5: Support for differential IODavid Shah2018-07-241-1/+15
* ecp5: Set BANKREF to correct VccIODavid Shah2018-07-241-2/+25
* ecp5: Add some more PIO helper functionsDavid Shah2018-07-232-0/+42
* ecp5: Helper functions for I/O placement and checkingDavid Shah2018-07-233-0/+324
* Remove getBelsByType() APIClifford Wolf2018-07-231-14/+0
* clangformatDavid Shah2018-07-231-2/+2
* ecp5: Add Add getGridDimX(), getGridDimY(), getTileDimZ()David Shah2018-07-231-0/+5
* clangformatClifford Wolf2018-07-231-2/+4
* ecp5: Implement new Grid APIsDavid Shah2018-07-232-0/+50
* ecp5: Remove obsolete db entries, add Bel z-positionDavid Shah2018-07-232-19/+2
* Move to new API and remove deprecatedMiodrag Milanovic2018-07-221-25/+0
* ecp5: Adding new Bel pin APIDavid Shah2018-07-223-3/+63
* ecp5: Fix regression following router updateDavid Shah2018-07-222-2/+2
* Rename getWireBelPin to getBelPinWireClifford Wolf2018-07-222-2/+2
* Change DelayInfo semantics to what we actually needClifford Wolf2018-07-211-3/+8
* Add getWireDelay APIClifford Wolf2018-07-211-0/+6
* ecp5: Tidying up examplesDavid Shah2018-07-1810-265/+40
* ecp5: Add support for pin name constraints using 'LOC' attributesDavid Shah2018-07-185-15/+64
* ecp5: Adding PIO data to chipdbDavid Shah2018-07-182-0/+101
* ecp5: Simple packer workingDavid Shah2018-07-184-16/+78
* ecp5: Add simple constant packerDavid Shah2018-07-183-2/+98
* ecp5: Function to handle constant LUT inputsDavid Shah2018-07-171-0/+26
* Add ArchNetInfo and ArchCellInfoClifford Wolf2018-07-171-0/+3
* ecp5: Fixing packer bugsDavid Shah2018-07-174-10/+29
* ecp5: Adding a slow and conservative placement validity checkerDavid Shah2018-07-173-7/+129
* ecp5: FF packerDavid Shah2018-07-171-1/+19
* ecp5: LUT packerDavid Shah2018-07-173-19/+95
* ecp5: Working on packer LUT pairing functionalityDavid Shah2018-07-171-0/+120
* ecp5: Infrastructure for FF packingDavid Shah2018-07-173-0/+71
* ecp5: Working on packerDavid Shah2018-07-171-9/+74
* ecp5: Refactor skeleton of packerDavid Shah2018-07-172-41/+55
* ecp5: Adding command line options for device typeDavid Shah2018-07-173-20/+23
* ecp5: Build all chip typesDavid Shah2018-07-173-3/+3
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-17 06:24:35 +0000