aboutsummaryrefslogtreecommitdiffstats
path: root/ecp5
diff options
context:
space:
mode:
authorDavid Shah <davey1576@gmail.com>2018-07-24 12:57:54 +0200
committerDavid Shah <davey1576@gmail.com>2018-07-24 12:57:54 +0200
commit35a6bc496eb28f26c42e25a5e746987329e96f3e (patch)
tree350f0a677556c1be5f1d37850732d875cd8d6dae /ecp5
parentf61e9e56094946492bdd364ab272c19919a9faca (diff)
downloadnextpnr-35a6bc496eb28f26c42e25a5e746987329e96f3e.tar.gz
nextpnr-35a6bc496eb28f26c42e25a5e746987329e96f3e.tar.bz2
nextpnr-35a6bc496eb28f26c42e25a5e746987329e96f3e.zip
ecp5: Support for differential IO
Signed-off-by: David Shah <davey1576@gmail.com>
Diffstat (limited to 'ecp5')
-rw-r--r--ecp5/bitstream.cc16
1 files changed, 15 insertions, 1 deletions
diff --git a/ecp5/bitstream.cc b/ecp5/bitstream.cc
index 1efee5fc..c2218762 100644
--- a/ecp5/bitstream.cc
+++ b/ecp5/bitstream.cc
@@ -258,6 +258,20 @@ void write_bitstream(Context *ctx, std::string base_config_file, std::string tex
std::string pic_tile = get_pic_tile(ctx, empty_chip, bel);
cc.tiles[pio_tile].add_enum(pio + ".BASE_TYPE", dir + "_" + iotype);
cc.tiles[pic_tile].add_enum(pio + ".BASE_TYPE", dir + "_" + iotype);
+ if (is_differential(ioType_from_str(iotype))) {
+ // Explicitly disable other pair
+ std::string other;
+ if (pio == "PIOA")
+ other = "PIOB";
+ else if (pio == "PIOC")
+ other = "PIOD";
+ else
+ log_error("cannot place differential IO at location %s\n", pio.c_str());
+ cc.tiles[pio_tile].add_enum(other + ".BASE_TYPE", "_NONE_");
+ cc.tiles[pic_tile].add_enum(other + ".BASE_TYPE", "_NONE_");
+ cc.tiles[pio_tile].add_enum(other + ".PULLMODE", "NONE");
+ cc.tiles[pio_tile].add_enum(pio + ".PULLMODE", "NONE");
+ }
if (dir != "INPUT" &&
(ci->ports.find(ctx->id("T")) == ci->ports.end() || ci->ports.at(ctx->id("T")).net == nullptr)) {
// Tie tristate low if unconnected for outputs or bidir
@@ -270,7 +284,7 @@ void write_bitstream(Context *ctx, std::string base_config_file, std::string tex
std::string cib_wirename = ctx->locInfo(cib_wire)->wire_data[cib_wire.index].name.get();
cc.tiles[cib_tile].add_enum("CIB." + cib_wirename + "MUX", "0");
}
- if (dir == "INPUT") {
+ if (dir == "INPUT" && !is_differential(ioType_from_str(iotype))) {
cc.tiles[pio_tile].add_enum(pio + ".HYSTERESIS", "ON");
}
} else {