Merge pull request #53 from YosysHQ/archattr

Add Attributes on arch objects and improve iCE40 gfx (IO tiles, BRAM tiles)

1 files changed, 8 insertions, 1 deletions

diff --git a/ice40/arch.h b/ice40/arch.h
index 8fd1af23..7f61c376 100644
--- a/ice40/arch.h
+++ b/ice40/arch.h
@@ -108,6 +108,8 @@ NPNR_PACKED_STRUCT(struct WireInfoPOD {
     };
 
     RelPtr<char> name;
+    int32_t netidx;
+
     int32_t num_uphill, num_downhill;
     RelPtr<int32_t> pips_uphill, pips_downhill;
 
@@ -225,6 +227,7 @@ NPNR_PACKED_STRUCT(struct ChipInfoPOD {
     RelPtr<BelConfigPOD> bel_config;
     RelPtr<PackageInfoPOD> packages_data;
     RelPtr<CellTimingPOD> cell_timing;
+    RelPtr<RelPtr<char>> tile_wire_names;
 });
 
 #if defined(_MSC_VER)
@@ -502,6 +505,8 @@ struct Arch : BaseCtx
         return IdString(chip_info->bel_data[bel.index].type);
     }
 
+    std::vector<std::pair<IdString, std::string>> getBelAttrs(BelId bel) const;
+
     WireId getBelPinWire(BelId bel, IdString pin) const;
     PortType getBelPinType(BelId bel, IdString pin) const;
     std::vector<IdString> getBelPins(BelId bel) const;
@@ -517,6 +522,7 @@ struct Arch : BaseCtx
     }
 
     IdString getWireType(WireId wire) const;
+    std::vector<std::pair<IdString, std::string>> getWireAttrs(WireId wire) const;
 
     uint32_t getWireChecksum(WireId wire) const { return wire.index; }
 
@@ -692,7 +698,8 @@ struct Arch : BaseCtx
 
     IdString getPipName(PipId pip) const;
 
-    IdString getPipType(PipId pip) const { return IdString(); }
+    IdString getPipType(PipId pip) const;
+    std::vector<std::pair<IdString, std::string>> getPipAttrs(PipId pip) const;
 
     uint32_t getPipChecksum(PipId pip) const { return pip.index; }