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| author | D. Shah <dave@ds0.me> | 2021-01-27 18:34:41 +0000 |
|---|---|---|
| committer | D. Shah <dave@ds0.me> | 2021-01-27 18:35:49 +0000 |
| commit | c10238de8c6087282ff1d6092929585277cbd17c (patch) | |
| tree | 0134a98527433c3aef4b626661466656f70678ea /gui | |
| parent | e049d5f2fc126a7157d0c33a36f094332da7bace (diff) | |
| download | nextpnr-c10238de8c6087282ff1d6092929585277cbd17c.tar.gz nextpnr-c10238de8c6087282ff1d6092929585277cbd17c.tar.bz2 nextpnr-c10238de8c6087282ff1d6092929585277cbd17c.zip | |
ice40: Switch from RelPtr to RelSlice
This replaces RelPtrs and a separate length field with a Rust-style
slice containing both a pointer and a length; with bounds checking
always enforced.
Thus iterating over these structures is both cleaner and safer.
Signed-off-by: D. Shah <dave@ds0.me>
Diffstat (limited to 'gui')
| -rw-r--r-- | gui/designwidget.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gui/designwidget.cc b/gui/designwidget.cc index 457b7de4..f856b5f6 100644 --- a/gui/designwidget.cc +++ b/gui/designwidget.cc @@ -306,7 +306,7 @@ void DesignWidget::newContext(Context *ctx) {
TreeModel::ElementXYRoot<WireId>::ElementMap wireMap;
#ifdef ARCH_ICE40
- for (int i = 0; i < ctx->chip_info->num_wires; i++) {
+ for (int i = 0; i < int(ctx->chip_info->wire_data.size()); i++) {
const auto wire = &ctx->chip_info->wire_data[i];
WireId wireid;
wireid.index = i;
|