fpga_interchange: tests: add cmake functions

Also move all tests in a tests directory

Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>

4 files changed, 69 insertions, 0 deletions

diff --git a/fpga_interchange/examples/tests/counter/CMakeLists.txt b/fpga_interchange/examples/tests/counter/CMakeLists.txt
new file mode 100644
index 00000000..e105a86a
--- /dev/null
+++ b/fpga_interchange/examples/tests/counter/CMakeLists.txt
@@ -0,0 +1,17 @@
+add_interchange_test(
+    name counter_basys3
+    part xc7a35tcpg236-1
+    package cpg236
+    tcl run.tcl
+    xdc counter.xdc
+    sources counter.v
+)
+
+add_interchange_test(
+    name counter_arty
+    part xc7a35tcsg324-1
+    package csg324
+    tcl run.tcl
+    xdc counter.xdc
+    sources counter.v
+)
diff --git a/fpga_interchange/examples/tests/counter/counter.v b/fpga_interchange/examples/tests/counter/counter.v
new file mode 100644
index 00000000..00f52a20
--- /dev/null
+++ b/fpga_interchange/examples/tests/counter/counter.v
@@ -0,0 +1,15 @@
+module top(input clk, input rst, output [7:4] io_led);
+
+reg [31:0] counter = 32'b0;
+
+assign io_led = counter >> 22;
+
+always @(posedge clk)
+begin
+    if(rst)
+        counter <= 32'b0;
+    else
+        counter <= counter + 1;
+end
+
+endmodule
diff --git a/fpga_interchange/examples/tests/counter/counter.xdc b/fpga_interchange/examples/tests/counter/counter.xdc
new file mode 100644
index 00000000..7cbe67f6
--- /dev/null
+++ b/fpga_interchange/examples/tests/counter/counter.xdc
@@ -0,0 +1,22 @@
+## basys3 breakout board
+set_property PACKAGE_PIN W5 [get_ports clk]
+set_property PACKAGE_PIN V17 [get_ports rst]
+#set_property PACKAGE_PIN U16 [get_ports io_led[0]]
+#set_property PACKAGE_PIN E19 [get_ports io_led[1]]
+#set_property PACKAGE_PIN U19 [get_ports io_led[2]]
+#set_property PACKAGE_PIN V19 [get_ports io_led[3]]
+set_property PACKAGE_PIN U16 [get_ports io_led[4]]
+set_property PACKAGE_PIN E19 [get_ports io_led[5]]
+set_property PACKAGE_PIN U19 [get_ports io_led[6]]
+set_property PACKAGE_PIN V19 [get_ports io_led[7]]
+
+set_property IOSTANDARD LVCMOS33 [get_ports clk]
+set_property IOSTANDARD LVCMOS33 [get_ports rst]
+set_property IOSTANDARD LVCMOS33 [get_ports io_led[4]]
+set_property IOSTANDARD LVCMOS33 [get_ports io_led[5]]
+set_property IOSTANDARD LVCMOS33 [get_ports io_led[6]]
+set_property IOSTANDARD LVCMOS33 [get_ports io_led[7]]
+#set_property IOSTANDARD LVCMOS33 [get_ports io_led[0]]
+#set_property IOSTANDARD LVCMOS33 [get_ports io_led[1]]
+#set_property IOSTANDARD LVCMOS33 [get_ports io_led[2]]
+#set_property IOSTANDARD LVCMOS33 [get_ports io_led[3]]
diff --git a/fpga_interchange/examples/tests/counter/run.tcl b/fpga_interchange/examples/tests/counter/run.tcl
new file mode 100644
index 00000000..7cd9f10f
--- /dev/null
+++ b/fpga_interchange/examples/tests/counter/run.tcl
@@ -0,0 +1,15 @@
+yosys -import
+
+read_verilog $::env(SOURCES)
+
+synth_xilinx -nolutram -nowidelut -nosrl -nocarry -nodsp
+techmap -map ../remap.v
+
+# opt_expr -undriven makes sure all nets are driven, if only by the $undef
+# net.
+opt_expr -undriven
+opt_clean
+
+setundef -zero -params
+
+write_json $::env(OUT_JSON)