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authorgatecat <gatecat@ds0.me>2021-02-10 11:54:54 +0000
committergatecat <gatecat@ds0.me>2021-02-10 11:54:54 +0000
commit85bb108ba40f9573571de0a785f9fbc91c4e1dd0 (patch)
tree8f198b13a648057d21c8e839afea5c4463c6189b /fpga_interchange/arch.h
parent6bd3dba1e39780e52097533f7e89f823d7e72956 (diff)
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Add getBelPinsForCellPin to Arch API
This is a basic implementation, without considering "M of N" arrangements (e.g. for LUT permuation where you only want to route to 1 out of 4/6 sinks) or using a type other than IdString to identify bel pins. But this is also enough to start working out where in nextpnr will break due to removing the 1:1 cell:bel pin cardinality, as a next step. Signed-off-by: gatecat <gatecat@ds0.me>
Diffstat (limited to 'fpga_interchange/arch.h')
-rw-r--r--fpga_interchange/arch.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/fpga_interchange/arch.h b/fpga_interchange/arch.h
index fd2d16a2..e5c7551b 100644
--- a/fpga_interchange/arch.h
+++ b/fpga_interchange/arch.h
@@ -660,6 +660,7 @@ struct ArchRanges
using TileBelsRangeT = BelRange;
using BelAttrsRangeT = std::vector<std::pair<IdString, std::string>>;
using BelPinsRangeT = IdStringRange;
+ using CellBelPinRangeT = std::array<IdString, 1>;
// Wires
using AllWiresRangeT = WireRange;
using DownhillPipRangeT = DownhillPipRange;
@@ -866,6 +867,8 @@ struct Arch : ArchAPI<ArchRanges>
return str_range;
}
+ std::array<IdString, 1> getBelPinsForCellPin(CellInfo *cell_info, IdString pin) const override { return {pin}; }
+
// -------------------------------------------------
WireId getWireByName(IdStringList name) const override;