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| author | myrtle <gatecat@ds0.me> | 2022-12-07 10:26:17 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-12-07 10:26:17 +0100 |
| commit | 519011533a3b7582b984226536cb424d462d1599 (patch) | |
| tree | 31ee37d2c50481ab5f5a5bec2b07ac46d7d7d9ca /fpga_interchange/arch.h | |
| parent | a342b96bb0d4370d3e575a0189da2273b94ea765 (diff) | |
| parent | d1afd6c0f1f8452d7461bbf33c84dbfd59236d03 (diff) | |
| download | nextpnr-519011533a3b7582b984226536cb424d462d1599.tar.gz nextpnr-519011533a3b7582b984226536cb424d462d1599.tar.bz2 nextpnr-519011533a3b7582b984226536cb424d462d1599.zip | |
Merge pull request #1058 from YosysHQ/gatecat/bounds-refactor
refactor: rename ArcBounds -> BoundingBox and use this in HeAP
Diffstat (limited to 'fpga_interchange/arch.h')
| -rw-r--r-- | fpga_interchange/arch.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/fpga_interchange/arch.h b/fpga_interchange/arch.h index 04f583d4..7e373a56 100644 --- a/fpga_interchange/arch.h +++ b/fpga_interchange/arch.h @@ -701,7 +701,7 @@ struct Arch : ArchAPI<ArchRanges> // ------------------------------------------------- delay_t estimateDelay(WireId src, WireId dst) const final; delay_t predictDelay(BelId src_bel, IdString src_pin, BelId dst_bel, IdString dst_pin) const final; - ArcBounds getRouteBoundingBox(WireId src, WireId dst) const final; + BoundingBox getRouteBoundingBox(WireId src, WireId dst) const final; delay_t getDelayEpsilon() const final { return 20; } delay_t getRipupDelayPenalty() const final { return 120; } float getDelayNS(delay_t v) const final { return v * 0.001; } @@ -896,7 +896,7 @@ struct Arch : ArchAPI<ArchRanges> } CellInfo *getClusterRootCell(ClusterId cluster) const override; - ArcBounds getClusterBounds(ClusterId cluster) const override; + BoundingBox getClusterBounds(ClusterId cluster) const override; Loc getClusterOffset(const CellInfo *cell) const override; bool isClusterStrict(const CellInfo *cell) const override; bool normal_cluster_placement(const Context *, const Cluster &, const ClusterPOD &, CellInfo *, BelId, |