diff options
| author | gatecat <gatecat@ds0.me> | 2021-12-19 18:46:10 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2021-12-19 18:46:10 +0000 |
| commit | 62a3e093856063180526b7189d5e711a98036fa0 (patch) | |
| tree | d03ba5688367cb476a06b19d04ca78d0352afce3 /fpga_interchange/arch.cc | |
| parent | 56d550733346000584b9490fac0953fe07124035 (diff) | |
| parent | ddb084e9a8a0cba10536951236cde824526e8071 (diff) | |
| download | nextpnr-62a3e093856063180526b7189d5e711a98036fa0.tar.gz nextpnr-62a3e093856063180526b7189d5e711a98036fa0.tar.bz2 nextpnr-62a3e093856063180526b7189d5e711a98036fa0.zip | |
Merge pull request #883 from YosysHQ/gatecat/new-predictdelay
archapi: Use arbitrary rather than actual placement in predictDelay [breaking change]
Diffstat (limited to 'fpga_interchange/arch.cc')
| -rw-r--r-- | fpga_interchange/arch.cc | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/fpga_interchange/arch.cc b/fpga_interchange/arch.cc index a39f49e6..917af85e 100644 --- a/fpga_interchange/arch.cc +++ b/fpga_interchange/arch.cc @@ -1000,14 +1000,16 @@ delay_t Arch::estimateDelay(WireId src, WireId dst) const #endif } -delay_t Arch::predictDelay(const NetInfo *net_info, const PortRef &sink) const +delay_t Arch::predictDelay(BelId src_bel, IdString src_pin, BelId dst_bel, IdString dst_pin) const { // FIXME: Implement when adding timing-driven place and route. + NPNR_UNUSED(src_pin); + NPNR_UNUSED(dst_pin); int src_x, src_y; - get_tile_x_y(net_info->driver.cell->bel.tile, &src_x, &src_y); + get_tile_x_y(src_bel.tile, &src_x, &src_y); int dst_x, dst_y; - get_tile_x_y(sink.cell->bel.tile, &dst_x, &dst_y); + get_tile_x_y(dst_bel.tile, &dst_x, &dst_y); delay_t base = 30 * std::min(std::abs(dst_x - src_x), 18) + 10 * std::max(std::abs(dst_x - src_x) - 18, 0) + 60 * std::min(std::abs(dst_y - src_y), 6) + 20 * std::max(std::abs(dst_y - src_y) - 6, 0) + 300; |