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| author | gatecat <gatecat@ds0.me> | 2021-05-16 16:25:05 +0100 |
|---|---|---|
| committer | gatecat <gatecat@ds0.me> | 2021-05-16 16:25:05 +0100 |
| commit | 5a41d2070c8a7c065d4e3fbfb70b3a3fbd19b319 (patch) | |
| tree | 62ee961ac0c4b8da9a3515b4236b39a6c5f7ebc7 /fpga_interchange/arch.cc | |
| parent | 179ae683cccede93dae9ef76ab82bd2617b224c7 (diff) | |
| download | nextpnr-5a41d2070c8a7c065d4e3fbfb70b3a3fbd19b319.tar.gz nextpnr-5a41d2070c8a7c065d4e3fbfb70b3a3fbd19b319.tar.bz2 nextpnr-5a41d2070c8a7c065d4e3fbfb70b3a3fbd19b319.zip | |
Run clangformat
Signed-off-by: gatecat <gatecat@ds0.me>
Diffstat (limited to 'fpga_interchange/arch.cc')
| -rw-r--r-- | fpga_interchange/arch.cc | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/fpga_interchange/arch.cc b/fpga_interchange/arch.cc index a05878f6..e94dab10 100644 --- a/fpga_interchange/arch.cc +++ b/fpga_interchange/arch.cc @@ -733,7 +733,6 @@ ArcBounds Arch::getRouteBoundingBox(WireId src, WireId dst) const int dst_tile = dst.tile == -1 ? chip_info->nodes[dst.index].tile_wires[0].tile : dst.tile; int src_tile = src.tile == -1 ? chip_info->nodes[src.index].tile_wires[0].tile : src.tile; - int src_x, src_y; get_tile_x_y(src_tile, &src_x, &src_y); @@ -1804,7 +1803,7 @@ bool Arch::checkPipAvailForNet(PipId pip, NetInfo *net) const const BelInfoPOD &bel_data = tile_type.bel_data[net->driver.cell->bel.index]; const SiteRouter &site_router = get_site_status(tile_status_iter->second, bel_data); - const auto& pips = site_router.valid_pips; + const auto &pips = site_router.valid_pips; auto result = std::find(pips.begin(), pips.end(), pip); if (result != pips.end()) { valid_pip = true; |