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| author | myrtle <gatecat@ds0.me> | 2022-12-07 10:26:17 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-12-07 10:26:17 +0100 |
| commit | 519011533a3b7582b984226536cb424d462d1599 (patch) | |
| tree | 31ee37d2c50481ab5f5a5bec2b07ac46d7d7d9ca /fpga_interchange/arch.cc | |
| parent | a342b96bb0d4370d3e575a0189da2273b94ea765 (diff) | |
| parent | d1afd6c0f1f8452d7461bbf33c84dbfd59236d03 (diff) | |
| download | nextpnr-519011533a3b7582b984226536cb424d462d1599.tar.gz nextpnr-519011533a3b7582b984226536cb424d462d1599.tar.bz2 nextpnr-519011533a3b7582b984226536cb424d462d1599.zip | |
Merge pull request #1058 from YosysHQ/gatecat/bounds-refactor
refactor: rename ArcBounds -> BoundingBox and use this in HeAP
Diffstat (limited to 'fpga_interchange/arch.cc')
| -rw-r--r-- | fpga_interchange/arch.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/fpga_interchange/arch.cc b/fpga_interchange/arch.cc index 4fc5d48d..d20fe253 100644 --- a/fpga_interchange/arch.cc +++ b/fpga_interchange/arch.cc @@ -730,7 +730,7 @@ std::vector<std::pair<IdString, std::string>> Arch::getBelAttrs(BelId bel) const // ----------------------------------------------------------------------- -ArcBounds Arch::getRouteBoundingBox(WireId src, WireId dst) const +BoundingBox Arch::getRouteBoundingBox(WireId src, WireId dst) const { int dst_tile = dst.tile == -1 ? chip_info->nodes[dst.index].tile_wires[0].tile : dst.tile; int src_tile = src.tile == -1 ? chip_info->nodes[src.index].tile_wires[0].tile : src.tile; |