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author | gatecat <gatecat@ds0.me> | 2021-03-23 16:59:35 +0000 |
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committer | GitHub <noreply@github.com> | 2021-03-23 16:59:35 +0000 |
commit | 2300d81c3c3874801176121b1a97446146ec6efd (patch) | |
tree | cd4fb58c4a239a360c65f45972e621381b908e42 /fpga_interchange/arch.cc | |
parent | 8c85e648dfdb73d69d4adbc6420e706d21d61f93 (diff) | |
parent | 831b94cdac7af66e11d0e3d67fa3bbff29678d05 (diff) | |
download | nextpnr-2300d81c3c3874801176121b1a97446146ec6efd.tar.gz nextpnr-2300d81c3c3874801176121b1a97446146ec6efd.tar.bz2 nextpnr-2300d81c3c3874801176121b1a97446146ec6efd.zip |
Merge pull request #640 from litghost/inversion_logic
Initial inverter logic for FPGA interchange
Diffstat (limited to 'fpga_interchange/arch.cc')
-rw-r--r-- | fpga_interchange/arch.cc | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/fpga_interchange/arch.cc b/fpga_interchange/arch.cc index b5bcc7c5..a0e516c2 100644 --- a/fpga_interchange/arch.cc +++ b/fpga_interchange/arch.cc @@ -1747,6 +1747,37 @@ bool Arch::checkPipAvail(PipId pip) const { return checkPipAvailForNet(pip, null std::string Arch::get_chipdb_hash() const { return chipdb_hash; } +bool Arch::is_inverting(PipId pip) const +{ + auto &tile_type = loc_info(chip_info, pip); + auto &pip_info = tile_type.pip_data[pip.index]; + if (pip_info.site == -1) { + // FIXME: Some routing pips are inverters, but this is missing from + // the chipdb. + return false; + } + + auto &bel_data = tile_type.bel_data[pip_info.bel]; + + // Is a fixed inverter if the non_inverting_pin is another pin. + return bel_data.non_inverting_pin != pip_info.extra_data && bel_data.inverting_pin == pip_info.extra_data; +} + +bool Arch::can_invert(PipId pip) const +{ + auto &tile_type = loc_info(chip_info, pip); + auto &pip_info = tile_type.pip_data[pip.index]; + if (pip_info.site == -1) { + return false; + } + + auto &bel_data = tile_type.bel_data[pip_info.bel]; + + // Can optionally invert if this pip is both the non_inverting_pin and + // inverting pin. + return bel_data.non_inverting_pin == pip_info.extra_data && bel_data.inverting_pin == pip_info.extra_data; +} + // Instance constraint templates. template void Arch::ArchConstraints::bindBel(Arch::ArchConstraints::TagState *, const Arch::ConstraintRange); template void Arch::ArchConstraints::unbindBel(Arch::ArchConstraints::TagState *, const Arch::ConstraintRange); |