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authorMiodrag Milanovic <mmicko@gmail.com>2019-10-11 15:31:07 +0200
committerMiodrag Milanovic <mmicko@gmail.com>2019-10-20 09:41:48 +0200
commit49b12a828ad647552fa440c42a8000d84ec9d85a (patch)
tree703e4b281ee83623806dc5254282073a4a0d4ea2 /ecp5/gfx.h
parent1ae64d7bf53cb988003fa9b3eff1f36c30d4d50d (diff)
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Add other side of slice wires
Diffstat (limited to 'ecp5/gfx.h')
-rw-r--r--ecp5/gfx.h99
1 files changed, 94 insertions, 5 deletions
diff --git a/ecp5/gfx.h b/ecp5/gfx.h
index 00d131e8..aa1c9185 100644
--- a/ecp5/gfx.h
+++ b/ecp5/gfx.h
@@ -65,8 +65,8 @@ enum GfxTileWireId
TILE_WIRE_M6_SLICE,
TILE_WIRE_FXBD_SLICE,
TILE_WIRE_FXAD_SLICE,
- TILE_WIRE_WRE3_SLICE_DUMMY,
- TILE_WIRE_WCK3_SLICE_DUMMY,
+ TILE_WIRE_DUMMY_1,
+ TILE_WIRE_DUMMY_2,
TILE_WIRE_CE3_SLICE,
TILE_WIRE_LSR3_SLICE,
TILE_WIRE_CLK3_SLICE,
@@ -85,8 +85,8 @@ enum GfxTileWireId
TILE_WIRE_M4_SLICE,
TILE_WIRE_FXBC_SLICE,
TILE_WIRE_FXAC_SLICE,
- TILE_WIRE_WRE2_SLICE_DUMMY,
- TILE_WIRE_WCK2_SLICE_DUMMY,
+ TILE_WIRE_DUMMY_3,
+ TILE_WIRE_DUMMY_4,
TILE_WIRE_CE2_SLICE,
TILE_WIRE_LSR2_SLICE,
TILE_WIRE_CLK2_SLICE,
@@ -129,7 +129,96 @@ enum GfxTileWireId
TILE_WIRE_WCK0_SLICE,
TILE_WIRE_CE0_SLICE,
TILE_WIRE_LSR0_SLICE,
- TILE_WIRE_CLK0_SLICE
+ TILE_WIRE_CLK0_SLICE,
+
+ TILE_WIRE_FCO_SLICE,
+ TILE_WIRE_FCID_SLICE,
+ TILE_WIRE_FCOC_SLICE,
+ TILE_WIRE_FCIC_SLICE,
+ TILE_WIRE_FCOB_SLICE,
+ TILE_WIRE_FCIB_SLICE,
+ TILE_WIRE_FCOA_SLICE,
+ TILE_WIRE_FCI_SLICE,
+
+ TILE_WIRE_DUMMY_100,
+ TILE_WIRE_DUMMY_101,
+ TILE_WIRE_DUMMY_102,
+ TILE_WIRE_DUMMY_103,
+ TILE_WIRE_DUMMY_104,
+ TILE_WIRE_DUMMY_105,
+ TILE_WIRE_DUMMY_106,
+ TILE_WIRE_DUMMY_107,
+ TILE_WIRE_DUMMY_108,
+ TILE_WIRE_DUMMY_109,
+ TILE_WIRE_DUMMY_110,
+ TILE_WIRE_DUMMY_111,
+ TILE_WIRE_DUMMY_112,
+ TILE_WIRE_FXD_SLICE,
+ TILE_WIRE_F7_SLICE,
+ TILE_WIRE_Q7_SLICE,
+ TILE_WIRE_Q6_SLICE,
+ TILE_WIRE_F6_SLICE,
+ TILE_WIRE_F5D_SLICE,
+
+ TILE_WIRE_WDO3C_SLICE,
+ TILE_WIRE_WDO2C_SLICE,
+ TILE_WIRE_WDO1C_SLICE,
+ TILE_WIRE_WDO0C_SLICE,
+ TILE_WIRE_DUMMY_200,
+ TILE_WIRE_WADO3C_SLICE,
+ TILE_WIRE_WADO2C_SLICE,
+ TILE_WIRE_WADO1C_SLICE,
+ TILE_WIRE_WADO0C_SLICE,
+ TILE_WIRE_DUMMY_201,
+ TILE_WIRE_DUMMY_202,
+ TILE_WIRE_DUMMY_203,
+ TILE_WIRE_DUMMY_204,
+ TILE_WIRE_FXC_SLICE,
+ TILE_WIRE_F5_SLICE,
+ TILE_WIRE_Q5_SLICE,
+ TILE_WIRE_Q4_SLICE,
+ TILE_WIRE_F4_SLICE,
+ TILE_WIRE_F5C_SLICE,
+
+ TILE_WIRE_DUMMY_300,
+ TILE_WIRE_DUMMY_301,
+ TILE_WIRE_WD1B_SLICE,
+ TILE_WIRE_WD0B_SLICE,
+ TILE_WIRE_DUMMY_302,
+ TILE_WIRE_WAD3B_SLICE,
+ TILE_WIRE_WAD2B_SLICE,
+ TILE_WIRE_WAD1B_SLICE,
+ TILE_WIRE_WAD0B_SLICE,
+ TILE_WIRE_DUMMY_303,
+ TILE_WIRE_DUMMY_304,
+ TILE_WIRE_DUMMY_305,
+ TILE_WIRE_DUMMY_306,
+ TILE_WIRE_FXB_SLICE,
+ TILE_WIRE_F3_SLICE,
+ TILE_WIRE_Q3_SLICE,
+ TILE_WIRE_Q2_SLICE,
+ TILE_WIRE_F2_SLICE,
+ TILE_WIRE_F5B_SLICE,
+
+ TILE_WIRE_DUMMY_400,
+ TILE_WIRE_DUMMY_401,
+ TILE_WIRE_WD1A_SLICE,
+ TILE_WIRE_WD0A_SLICE,
+ TILE_WIRE_DUMMY_402,
+ TILE_WIRE_WAD3A_SLICE,
+ TILE_WIRE_WAD2A_SLICE,
+ TILE_WIRE_WAD1A_SLICE,
+ TILE_WIRE_WAD0A_SLICE,
+ TILE_WIRE_DUMMY_403,
+ TILE_WIRE_DUMMY_404,
+ TILE_WIRE_DUMMY_405,
+ TILE_WIRE_DUMMY_406,
+ TILE_WIRE_FXA_SLICE,
+ TILE_WIRE_F1_SLICE,
+ TILE_WIRE_Q1_SLICE,
+ TILE_WIRE_Q0_SLICE,
+ TILE_WIRE_F0_SLICE,
+ TILE_WIRE_F5A_SLICE
};
NEXTPNR_NAMESPACE_END