ecp5: Infrastructure for BRAM bitstream gen

Signed-off-by: David Shah <dave@ds0.me>

1 files changed, 9 insertions, 0 deletions

diff --git a/ecp5/config.h b/ecp5/config.h
index 3d2ef971..c7e2c3d9 100644
--- a/ecp5/config.h
+++ b/ecp5/config.h
@@ -98,6 +98,14 @@ std::ostream &operator<<(std::ostream &out, const TileConfig &tc);
 
 std::istream &operator>>(std::istream &in, TileConfig &ce);
 
+// A group of tiles to configure at once for a particular feature that is split across tiles
+// TileGroups are currently for non-routing configuration only
+struct TileGroup
+{
+    std::vector<std::string> tiles;
+    TileConfig config;
+};
+
 // This represents the configuration of a chip at a high level
 class ChipConfig
 {
@@ -105,6 +113,7 @@ class ChipConfig
     std::string chip_name;
     std::vector<std::string> metadata;
     std::map<std::string, TileConfig> tiles;
+    std::vector<TileGroup> tilegroups;
 };
 
 std::ostream &operator<<(std::ostream &out, const ChipConfig &cc);