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authorgatecat <gatecat@ds0.me>2022-03-26 17:07:15 +0000
committerGitHub <noreply@github.com>2022-03-26 17:07:15 +0000
commit3ed53153ca3b38f5d488604607b50627c0b5639a (patch)
tree166fe889cab7346eb4e303e39861eed64689b422
parent374ac6d162a068601e2933a5794a9a5b8aae6ae0 (diff)
parentbe8d3fd74dae297d79e41165c2141aadef3d6582 (diff)
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Merge pull request #963 from yrabbit/oddr-quirk
gowin: Consider the peculiarity of GW1NR-9C
-rw-r--r--gowin/arch.cc15
-rw-r--r--gowin/arch.h3
-rw-r--r--gowin/constids.inc2
-rw-r--r--gowin/pack.cc7
4 files changed, 27 insertions, 0 deletions
diff --git a/gowin/arch.cc b/gowin/arch.cc
index fa0a66a3..dc40b179 100644
--- a/gowin/arch.cc
+++ b/gowin/arch.cc
@@ -1158,6 +1158,21 @@ Arch::Arch(ArchArgs args) : args(args)
snprintf(buf, 32, "R%dC%d_%s", row + 1, col + 1, portname.c_str(this));
addBelInput(belname, id_CLK, id(buf));
+ const PairPOD *xxx_port = pairLookup(bel->ports.get(), bel->num_ports, ID_XXX_VSS);
+ if (xxx_port != nullptr) {
+ ddr_has_extra_inputs = true;
+ portname = IdString(xxx_port->src_id);
+ snprintf(buf, 32, "R%dC%d_%s", row + 1, col + 1, portname.c_str(this));
+ addBelInput(belname, id_XXX_VSS, id(buf));
+ }
+ xxx_port = pairLookup(bel->ports.get(), bel->num_ports, ID_XXX_VCC);
+ if (xxx_port != nullptr) {
+ ddr_has_extra_inputs = true;
+ portname = IdString(xxx_port->src_id);
+ snprintf(buf, 32, "R%dC%d_%s", row + 1, col + 1, portname.c_str(this));
+ addBelInput(belname, id_XXX_VCC, id(buf));
+ }
+
if (oddrc) {
portname = IdString(pairLookup(bel->ports.get(), bel->num_ports, ID_CE)->src_id);
snprintf(buf, 32, "R%dC%d_%s", row + 1, col + 1, portname.c_str(this));
diff --git a/gowin/arch.h b/gowin/arch.h
index c8392e7e..bc29a59b 100644
--- a/gowin/arch.h
+++ b/gowin/arch.h
@@ -470,6 +470,9 @@ struct Arch : BaseArch<ArchRanges>
void updateClockSpinesCache(IdString spine_id, IdString wire_id);
void fixClockSpineDecals(void);
+ // XXX GW1N-9C DDR quirk
+ bool ddr_has_extra_inputs = false;
+
// Permissible combinations of modes in a single slice
std::map<const IdString, IdString> dff_comp_mode;
};
diff --git a/gowin/constids.inc b/gowin/constids.inc
index b293293b..8159cc10 100644
--- a/gowin/constids.inc
+++ b/gowin/constids.inc
@@ -681,6 +681,8 @@ X(IOBJS)
// IOLOGIC
X(TX)
+X(XXX_VSS)
+X(XXX_VCC)
X(OBUF_TYPE)
X(SBUF)
X(DBUF)
diff --git a/gowin/pack.cc b/gowin/pack.cc
index d31b4a84..28370a75 100644
--- a/gowin/pack.cc
+++ b/gowin/pack.cc
@@ -798,6 +798,13 @@ static void pack_iologic(Context *ctx)
ci->attrs[id_IOBUF] = 1;
}
}
+ // if have XXX_ inputs connect them
+ if (ctx->ddr_has_extra_inputs) {
+ ci->addInput(id_XXX_VSS);
+ ci->connectPort(id_XXX_VSS, ctx->nets[ctx->id("$PACKER_GND_NET")].get());
+ ci->addInput(id_XXX_VCC);
+ ci->connectPort(id_XXX_VCC, ctx->nets[ctx->id("$PACKER_VCC_NET")].get());
+ }
} break;
default:
break;