iCE40/ghdl - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	[PATCH] synth-environment: fix thinkos.	Tristan Gingold	2019-08-31	1	-14/+57
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*	synth: add physical division (#904)	tgingold	2019-08-30	1	-1/+11
\|\ \| \| \| \| \| \| \| \| \| \|	* synth: added division of physical type * testsuite/synth: added test for the physical division
\| *	synth: added division of physical type	Martin Doerfelt	2019-08-30	1	-1/+11
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* \|	synth: add support for --synth on llvm, link with -lm.	Tristan Gingold	2019-08-30	2	-0/+6
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* \|	synth: fix type elaboration of interfaces.	Tristan Gingold	2019-08-30	1	-2/+0
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* \|	synth: remove unused const gates.	Tristan Gingold	2019-08-30	2	-13/+5
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* \|	vhdl-annotations: ignore conditional variable assignment.	Tristan Gingold	2019-08-30	1	-1/+2
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* \|	vhdl-annotate: handle shared anonymous subtype in interfaces.	Tristan Gingold	2019-08-30	1	-1/+4
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* \|	synth: ignore report statement.	Tristan Gingold	2019-08-30	1	-0/+2
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* \|	vhdl: recognize ieee.numeric_std std_match.	Tristan Gingold	2019-08-30	2	-0/+39
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* \|	std_names: add std_match	Tristan Gingold	2019-08-30	2	-3/+5
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* \|	vhdl: recognize 1164 condition operator, handle in synth.	Tristan Gingold	2019-08-30	3	-5/+19
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* \|	synth: handle enumeration subtype in ranges.	Tristan Gingold	2019-08-30	1	-1/+2
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* \|	synth: fix named association in record aggregate.	Tristan Gingold	2019-08-30	1	-1/+3
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*	synth: add support for record types.	Tristan Gingold	2019-08-29	13	-82/+361
\| \| \| \|	(WIP: need to fix regression of stmt01).
*	synth: Integer operators (#902)	marph91	2019-08-28	1	-0/+16
\| \| \| \| \| \| \| \|	* synth: added missing integer operators I. e. inequality and remainder. * testsuite/synth: added testcase for the missing integer operators
*	synth: support sequential conditional signal assignment.	Tristan Gingold	2019-08-27	2	-0/+3
\| \| \| \|	Fix tgingold/ghdlsynth-beta#40
*	synth: rework partial assignments	Tristan Gingold	2019-08-27	10	-182/+608
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*	netlists-disp_vhdl: do not used literals for prefixes.	Tristan Gingold	2019-08-27	1	-12/+53
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*	ignore restrict in simulation (#897)	Pepijn de Vos	2019-08-20	2	-18/+17
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*	synth: add support for constant exponentiation.	Tristan Gingold	2019-08-20	1	-0/+10
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*	synth: set name to assert/assume gates.	Tristan Gingold	2019-08-20	4	-12/+44
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*	netlist: fix minor pasto.	Tristan Gingold	2019-08-20	1	-1/+1
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*	initial support for reduce and/or (#900)	Pepijn de Vos	2019-08-20	5	-6/+52
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*	vhdl psl: fully scan PSL keywords in scanner.	Tristan Gingold	2019-08-20	7	-67/+148
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*	vhdl-prints: handle architecture in verification unit hierarchical name.	Tristan Gingold	2019-08-20	1	-0/+7
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*	vhdl: handle architecture in verification unit hierarchical name.	Tristan Gingold	2019-08-20	3	-13/+53
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*	vhdl-prints: handle verification units.	Tristan Gingold	2019-08-20	1	-318/+354
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*	vhdl: handle assume in verification units.	Tristan Gingold	2019-08-20	5	-1/+11
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*	synth: analyze input files.	Tristan Gingold	2019-08-20	1	-1/+8
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*	synth: set location on assume/assert gates.	Tristan Gingold	2019-08-20	3	-8/+19
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*	synth: handle verification units.	Tristan Gingold	2019-08-20	13	-246/+450
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*	synth: handle array attribute "length" (#895)	marph91	2019-08-19	1	-0/+10
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*	synth: fix tgingold/ghdlsynth#34 (association).	Tristan Gingold	2019-08-17	1	-2/+1
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*	vhdl: parse verification unit (WIP).	Tristan Gingold	2019-08-17	15	-363/+549
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*	synth: handle integer values in subtype conversion.	Tristan Gingold	2019-08-16	1	-0/+2
\| \| \| \|	For tgingold/ghdlsynth-beta#33
*	synth: handle integers for displaying vhdl ports.	Tristan Gingold	2019-08-16	1	-0/+10
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*	vhdl: declare verification units (WIP).	Tristan Gingold	2019-08-16	12	-280/+551
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*	vhdl: recognize PSL units reserved words.	Tristan Gingold	2019-08-16	6	-14/+29
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*	synth: handle array attributes; handle integer subtypes in generics.	Tristan Gingold	2019-08-16	2	-2/+91
\| \| \| \|	Fix tgingold/ghdlsynth-beta#32
*	add synthesis support for logic operators on numeric types (#893)	Pepijn de Vos	2019-08-15	4	-4/+149
\| \| \| \| \| \| \| \|	* add logic operators on unsigned * handle signed too * handle unary not
*	synth: fix handling of assume/assert.	Tristan Gingold	2019-08-14	1	-6/+65
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*	ghdlsynth: add command to get libghdl paths.	Tristan Gingold	2019-08-14	4	-22/+97
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*	ghdldrv: move command_str_disp from ghdlvpi to ghdlmain	Tristan Gingold	2019-08-14	3	-38/+38
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*	ghdlsynth: declare init_for_ghdl_synth.	Tristan Gingold	2019-08-14	1	-1/+4
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*	vhdl: handle PSL keywords as vhdl08 reserved words; switch to PSL scanner mode.	Tristan Gingold	2019-08-14	2	-0/+12
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*	vhdl: add PSL keywords to vhdl08 reserved words.	Tristan Gingold	2019-08-14	10	-242/+257
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*	synth: also extract edge in PSL expressions.	Tristan Gingold	2019-08-13	3	-18/+36
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*	synth: extract edge for PSL clocks.	Tristan Gingold	2019-08-13	1	-27/+34
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*	vhdl-nodes_walk: handle iir_kind_psl_default_clock.	Tristan Gingold	2019-08-13	1	-1/+2
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