add synthesis support for logic operators on numeric types (#893)

* add logic operators on unsigned

* handle signed too

* handle unary not

4 files changed, 149 insertions, 4 deletions

diff --git a/src/synth/synth-disp_vhdl.adb b/src/synth/synth-disp_vhdl.adb
index e7d61b11c..2abd0da44 100644
--- a/src/synth/synth-disp_vhdl.adb
+++ b/src/synth/synth-disp_vhdl.adb
@@ -25,6 +25,7 @@ with Name_Table;
 with Vhdl.Prints;
 with Vhdl.Std_Package;
 with Vhdl.Ieee.Std_Logic_1164;
+with Vhdl.Ieee.Numeric;
 with Vhdl.Errors; use Vhdl.Errors;
 with Vhdl.Utils; use Vhdl.Utils;
 
@@ -101,6 +102,16 @@ package body Synth.Disp_Vhdl is
                end if;
                Put_Line (";");
                Idx := Idx + 1;
+            elsif Btype = Vhdl.Ieee.Numeric.Numeric_Std_Unsigned_Type
+               or Btype = Vhdl.Ieee.Numeric.Numeric_Std_Signed_Type then
+               Put ("  wrap_" & Pfx & " <= std_logic_vector(" & Pfx);
+               if Desc.W = 1 then
+                  --  This is an array of length 1.  A scalar is used in the
+                  --  netlist.
+                  Put (" (" & Pfx & "'left)");
+               end if;
+               Put_Line (");");
+               Idx := Idx + 1;
             else
                Error_Kind ("disp_in_converter(arr)", Ptype);
             end if;
diff --git a/src/synth/synth-expr.adb b/src/synth/synth-expr.adb
index 592f25297..43a2f4c3b 100644
--- a/src/synth/synth-expr.adb
+++ b/src/synth/synth-expr.adb
@@ -933,12 +933,30 @@ package body Synth.Expr is
            | Iir_Predefined_Ieee_1164_Scalar_Xnor =>
             return Synth_Bit_Dyadic (Id_Xnor);
 
-         when Iir_Predefined_Ieee_1164_Vector_And =>
+         when Iir_Predefined_Ieee_1164_Vector_And
+            | Iir_Predefined_Ieee_Numeric_Std_And_Uns_Uns
+            | Iir_Predefined_Ieee_Numeric_Std_And_Sgn_Sgn =>
             return Synth_Vec_Dyadic (Id_And);
-         when Iir_Predefined_Ieee_1164_Vector_Or =>
+         when Iir_Predefined_Ieee_1164_Vector_Or
+            | Iir_Predefined_Ieee_Numeric_Std_Or_Uns_Uns
+            | Iir_Predefined_Ieee_Numeric_Std_Or_Sgn_Sgn =>
             return Synth_Vec_Dyadic (Id_Or);
-         when Iir_Predefined_Ieee_1164_Vector_Xor =>
+         when Iir_Predefined_Ieee_1164_Vector_Nand
+            | Iir_Predefined_Ieee_Numeric_Std_Nand_Uns_Uns
+            | Iir_Predefined_Ieee_Numeric_Std_Nand_Sgn_Sgn =>
+            return Synth_Vec_Dyadic (Id_Nand);
+         when Iir_Predefined_Ieee_1164_Vector_Nor
+            | Iir_Predefined_Ieee_Numeric_Std_Nor_Uns_Uns
+            | Iir_Predefined_Ieee_Numeric_Std_Nor_Sgn_Sgn =>
+            return Synth_Vec_Dyadic (Id_Nor);
+         when Iir_Predefined_Ieee_1164_Vector_Xor
+            | Iir_Predefined_Ieee_Numeric_Std_Xor_Uns_Uns
+            | Iir_Predefined_Ieee_Numeric_Std_Xor_Sgn_Sgn =>
             return Synth_Vec_Dyadic (Id_Xor);
+         when Iir_Predefined_Ieee_1164_Vector_Xnor
+            | Iir_Predefined_Ieee_Numeric_Std_Xnor_Uns_Uns
+            | Iir_Predefined_Ieee_Numeric_Std_Xnor_Sgn_Sgn =>
+            return Synth_Vec_Dyadic (Id_Xnor);
 
          when Iir_Predefined_Enum_Equality =>
             if Is_Bit_Type (Left_Type) then
@@ -1218,7 +1236,9 @@ package body Synth.Expr is
             return null;
          when Iir_Predefined_Ieee_1164_Scalar_Not =>
             return Synth_Bit_Monadic (Id_Not);
-         when Iir_Predefined_Ieee_1164_Vector_Not =>
+         when Iir_Predefined_Ieee_1164_Vector_Not
+            | Iir_Predefined_Ieee_Numeric_Std_Not_Uns
+            | Iir_Predefined_Ieee_Numeric_Std_Not_Sgn =>
             return Synth_Vec_Monadic (Id_Not);
          when Iir_Predefined_Ieee_Numeric_Std_Neg_Uns
            | Iir_Predefined_Ieee_Numeric_Std_Neg_Sgn =>
diff --git a/src/vhdl/vhdl-ieee-numeric.adb b/src/vhdl/vhdl-ieee-numeric.adb
index ad13f9274..4a9ba8508 100644
--- a/src/vhdl/vhdl-ieee-numeric.adb
+++ b/src/vhdl/vhdl-ieee-numeric.adb
@@ -188,6 +188,85 @@ package body Vhdl.Ieee.Numeric is
       Pkg_Bit =>
         (others => Iir_Predefined_None));
 
+   Not_Patterns : constant Unary_Pattern_Type :=
+     (Pkg_Std =>
+        (Type_Unsigned => Iir_Predefined_Ieee_Numeric_Std_Not_Uns,
+         Type_Signed => Iir_Predefined_Ieee_Numeric_Std_Not_Sgn),
+      Pkg_Bit =>
+        (others => Iir_Predefined_None));
+
+   And_Patterns : constant Binary_Pattern_Type :=
+     (Pkg_Std =>
+        (Type_Unsigned =>
+           (Arg_Vect_Vect => Iir_Predefined_Ieee_Numeric_Std_And_Uns_Uns,
+            others        => Iir_Predefined_None),
+         Type_Signed =>
+           (Arg_Vect_Vect => Iir_Predefined_Ieee_Numeric_Std_And_Sgn_Sgn,
+            others        => Iir_Predefined_None)),
+      Pkg_Bit =>
+        (others =>
+           (others => Iir_Predefined_None)));
+
+   Or_Patterns : constant Binary_Pattern_Type :=
+     (Pkg_Std =>
+        (Type_Unsigned =>
+           (Arg_Vect_Vect => Iir_Predefined_Ieee_Numeric_Std_Or_Uns_Uns,
+            others        => Iir_Predefined_None),
+         Type_Signed =>
+           (Arg_Vect_Vect => Iir_Predefined_Ieee_Numeric_Std_Or_Sgn_Sgn,
+            others        => Iir_Predefined_None)),
+      Pkg_Bit =>
+        (others =>
+           (others => Iir_Predefined_None)));
+
+   Nand_Patterns : constant Binary_Pattern_Type :=
+     (Pkg_Std =>
+        (Type_Unsigned =>
+           (Arg_Vect_Vect => Iir_Predefined_Ieee_Numeric_Std_Nand_Uns_Uns,
+            others        => Iir_Predefined_None),
+         Type_Signed =>
+           (Arg_Vect_Vect => Iir_Predefined_Ieee_Numeric_Std_Nand_Sgn_Sgn,
+            others        => Iir_Predefined_None)),
+      Pkg_Bit =>
+        (others =>
+           (others => Iir_Predefined_None)));
+
+   Nor_Patterns : constant Binary_Pattern_Type :=
+     (Pkg_Std =>
+        (Type_Unsigned =>
+           (Arg_Vect_Vect => Iir_Predefined_Ieee_Numeric_Std_Nor_Uns_Uns,
+            others        => Iir_Predefined_None),
+         Type_Signed =>
+           (Arg_Vect_Vect => Iir_Predefined_Ieee_Numeric_Std_Nor_Sgn_Sgn,
+            others        => Iir_Predefined_None)),
+      Pkg_Bit =>
+        (others =>
+           (others => Iir_Predefined_None)));
+
+   Xor_Patterns : constant Binary_Pattern_Type :=
+     (Pkg_Std =>
+        (Type_Unsigned =>
+           (Arg_Vect_Vect => Iir_Predefined_Ieee_Numeric_Std_Xor_Uns_Uns,
+            others        => Iir_Predefined_None),
+         Type_Signed =>
+           (Arg_Vect_Vect => Iir_Predefined_Ieee_Numeric_Std_Xor_Sgn_Sgn,
+            others        => Iir_Predefined_None)),
+      Pkg_Bit =>
+        (others =>
+           (others => Iir_Predefined_None)));
+
+   Xnor_Patterns : constant Binary_Pattern_Type :=
+     (Pkg_Std =>
+        (Type_Unsigned =>
+           (Arg_Vect_Vect => Iir_Predefined_Ieee_Numeric_Std_Xnor_Uns_Uns,
+            others        => Iir_Predefined_None),
+         Type_Signed =>
+           (Arg_Vect_Vect => Iir_Predefined_Ieee_Numeric_Std_Xnor_Sgn_Sgn,
+            others        => Iir_Predefined_None)),
+      Pkg_Bit =>
+        (others =>
+           (others => Iir_Predefined_None)));
+
    Error : exception;
 
    procedure Extract_Declarations (Pkg_Decl : Iir_Package_Declaration;
@@ -436,6 +515,18 @@ package body Vhdl.Ieee.Numeric is
                         Handle_Binary (Gt_Patterns);
                      when Name_Op_Greater_Equal =>
                         Handle_Binary (Ge_Patterns);
+                     when Name_And =>
+                        Handle_Binary (And_Patterns);
+                     when Name_Or =>
+                        Handle_Binary (Or_Patterns);
+                     when Name_Nand =>
+                        Handle_Binary (Nand_Patterns);
+                     when Name_Nor =>
+                        Handle_Binary (Nor_Patterns);
+                     when Name_Xor =>
+                        Handle_Binary (Xor_Patterns);
+                     when Name_Xnor =>
+                        Handle_Binary (Xnor_Patterns);
                      when Name_To_Bstring
                        | Name_To_Ostring
                        | Name_To_Hstring =>
@@ -454,6 +545,8 @@ package body Vhdl.Ieee.Numeric is
                   case Get_Identifier (Decl) is
                      when Name_Op_Minus =>
                         Handle_Unary (Neg_Patterns);
+                     when Name_Not =>
+                        Handle_Unary (Not_Patterns);
                      when Name_To_Integer =>
                         Handle_To_Integer;
                      when others =>
diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads
index aa6c1aa47..d34c325ae 100644
--- a/src/vhdl/vhdl-nodes.ads
+++ b/src/vhdl/vhdl-nodes.ads
@@ -4931,6 +4931,27 @@ package Vhdl.Nodes is
       Iir_Predefined_Ieee_Numeric_Std_Ne_Sgn_Int,
       Iir_Predefined_Ieee_Numeric_Std_Ne_Int_Sgn,
 
+      Iir_Predefined_Ieee_Numeric_Std_Not_Uns,
+      Iir_Predefined_Ieee_Numeric_Std_Not_Sgn,
+
+      Iir_Predefined_Ieee_Numeric_Std_And_Uns_Uns,
+      Iir_Predefined_Ieee_Numeric_Std_And_Sgn_Sgn,
+
+      Iir_Predefined_Ieee_Numeric_Std_Or_Uns_Uns,
+      Iir_Predefined_Ieee_Numeric_Std_Or_Sgn_Sgn,
+
+      Iir_Predefined_Ieee_Numeric_Std_Nand_Uns_Uns,
+      Iir_Predefined_Ieee_Numeric_Std_Nand_Sgn_Sgn,
+
+      Iir_Predefined_Ieee_Numeric_Std_Nor_Uns_Uns,
+      Iir_Predefined_Ieee_Numeric_Std_Nor_Sgn_Sgn,
+
+      Iir_Predefined_Ieee_Numeric_Std_Xor_Uns_Uns,
+      Iir_Predefined_Ieee_Numeric_Std_Xor_Sgn_Sgn,
+
+      Iir_Predefined_Ieee_Numeric_Std_Xnor_Uns_Uns,
+      Iir_Predefined_Ieee_Numeric_Std_Xnor_Sgn_Sgn,
+
       --  Unary functions for numeric_std
       Iir_Predefined_Ieee_Numeric_Std_Neg_Uns,
       Iir_Predefined_Ieee_Numeric_Std_Neg_Sgn,