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author | Tristan Gingold <tgingold@free.fr> | 2019-08-30 04:41:14 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2019-08-30 04:41:14 +0200 |
commit | f232983f1ec699d1c5c84045614c3a4d30098f9a (patch) | |
tree | 848ab04107240716c120ff494a5c9f6480706431 /src | |
parent | d159fdfb9bc4491a73c534d480fc7d2061a426dc (diff) | |
download | ghdl-f232983f1ec699d1c5c84045614c3a4d30098f9a.tar.gz ghdl-f232983f1ec699d1c5c84045614c3a4d30098f9a.tar.bz2 ghdl-f232983f1ec699d1c5c84045614c3a4d30098f9a.zip |
synth: fix type elaboration of interfaces.
Diffstat (limited to 'src')
-rw-r--r-- | src/synth/synth-stmts.adb | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/synth/synth-stmts.adb b/src/synth/synth-stmts.adb index eb8254756..c36400e91 100644 --- a/src/synth/synth-stmts.adb +++ b/src/synth/synth-stmts.adb @@ -1019,8 +1019,6 @@ package body Synth.Stmts is while Is_Valid (Assoc) loop Inter := Get_Association_Interface (Assoc, Assoc_Inter); - Synth_Declaration_Type (Subprg_Inst, Inter); - case Iir_Parameter_Modes (Get_Mode (Inter)) is when Iir_In_Mode => case Get_Kind (Assoc) is |