| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | synth-vhdl_oper: refactoring | Tristan Gingold | 2022-11-30 | 1 | -61/+86 |
| * | vhdl-evaluation: improve handling of ieee 08 static functions. | Tristan Gingold | 2022-11-28 | 2 | -36/+51 |
| * | synth-vhdl_eval(eval_static_predefined_function_call): handle all operations | Tristan Gingold | 2022-11-28 | 4 | -987/+956 |
| * | file_comments: fix handling of comment on the same line. | Tristan Gingold | 2022-11-27 | 2 | -22/+54 |
| * | vhdl: rework comment gathering to handle empty lines. | Tristan Gingold | 2022-11-27 | 9 | -166/+398 |
| * | vhdl-parse: add a comment | Tristan Gingold | 2022-11-23 | 1 | -2/+4 |
| * | file_comments: add comments_range to support deferred gathering | Tristan Gingold | 2022-11-23 | 5 | -5/+81 |
| * | vhdl-parse: gather comments for subprograms | Tristan Gingold | 2022-11-22 | 1 | -0/+5 |
| * | vhdl-parse: gather comments for enumerations and their literals | Tristan Gingold | 2022-11-22 | 1 | -1/+15 |
| * | vhdl-parse: gather more comments (type, objects) | Tristan Gingold | 2022-11-22 | 1 | -1/+22 |
| * | vhdl-parse: handle inside comments | Tristan Gingold | 2022-11-21 | 1 | -0/+31 |
| * | vhdl-prints: add an option to display comments | Tristan Gingold | 2022-11-20 | 3 | -3/+74 |
| * | pyGHDL: add file_comments.py | Tristan Gingold | 2022-11-20 | 4 | -2/+42 |
| * | Add an API to gather comments. | Tristan Gingold | 2022-11-20 | 7 | -4/+380 |
| * | grt-algos: clarify the API | Tristan Gingold | 2022-11-20 | 3 | -6/+11 |
| * | vhdl-evaluation(build_array_choices_vector): handle vhdl-08 aggregates. | Tristan Gingold | 2022-11-16 | 3 | -47/+61 |
| * | vhdl-sem_expr: fix aggregate index for vhdl-08 | Tristan Gingold | 2022-11-16 | 1 | -13/+42 |
| * | synth: improve error message for ghdl/ghdl-yosys-plugin#179 | Tristan Gingold | 2022-11-15 | 1 | -1/+3 |
| * | synth: avoid a crash on signal assignment in non-sensitized process. | Tristan Gingold | 2022-11-14 | 1 | -2/+9 |
| * | Remove trailing spaces | Tristan Gingold | 2022-11-08 | 2 | -2/+2 |
| * | elab-vhdl_expr: fix a crash on simple aggregates. Fix #2240 | Tristan Gingold | 2022-11-08 | 2 | -15/+13 |
| * | vhdl: fix some compiler warnings | Tristan Gingold | 2022-11-08 | 3 | -6/+2 |
| * | vhdl-sem_expr: fix a crash after error. Fix #2239 | Tristan Gingold | 2022-11-08 | 1 | -0/+2 |
| * | Added id to warnings related to attributes. (#2242) | cderrien | 2022-11-08 | 5 | -2/+25 |
| * | Escape port name in dot output. (#2241) | cderrien | 2022-11-08 | 1 | -1/+1 |
| * | vhdl/translate: handle predefined operators as conversion functions | Tristan Gingold | 2022-11-07 | 3 | -44/+73 |
| * | netlists-memories: refactoring | Tristan Gingold | 2022-11-06 | 1 | -113/+105 |
| * | netlists-memories: factorize code. | Tristan Gingold | 2022-11-06 | 1 | -83/+41 |
| * | netlists: factorize code | Tristan Gingold | 2022-11-06 | 1 | -100/+56 |
| * | synth-environment.adb: fix warning | Tristan Gingold | 2022-11-05 | 1 | -1/+0 |
| * | synth: rework memory inference. Fix #2232 | Tristan Gingold | 2022-11-05 | 3 | -78/+233 |
| * | netlists-builders: allow building mem_wr_sync without clk and en. | Tristan Gingold | 2022-11-05 | 1 | -4/+10 |
| * | synth: infere a dff (instead of an idff) when the init value is X | Tristan Gingold | 2022-11-03 | 2 | -6/+21 |
| * | vhdl-sem_expr(sem_qualified_expression): relax staticness rules. | Tristan Gingold | 2022-11-02 | 1 | -1/+11 |
| * | synth: handle bit/unsigned and bit/signed vhdl 08 operators. | Tristan Gingold | 2022-11-02 | 1 | -12/+36 |
| * | Add missing -g for generic override to CLI help for RUNOPTS (#2220) | svnesbo | 2022-11-01 | 1 | -0/+1 |
| * | netlists-inference: handle flip-flop with different patterns. | Tristan Gingold | 2022-10-30 | 1 | -23/+75 |
| * | netlists-gates: add a comment | Tristan Gingold | 2022-10-30 | 1 | -0/+1 |
| * | vhdl-sem_names(sem_name_free): handle iir_kind_slice_name. For #2233 | Tristan Gingold | 2022-10-29 | 1 | -0/+1 |
| * | vhdl-evaluation: handle to_string_digits. For #2233 | Tristan Gingold | 2022-10-29 | 1 | -5/+50 |
| * | synth: internal refactoring | Tristan Gingold | 2022-10-29 | 4 | -121/+93 |
| * | elab-vhdl_types: abstract elab_floating_type_definition | Tristan Gingold | 2022-10-29 | 1 | -10/+15 |
| * | synth: fix crash in disp_verilog. Fix #2234 | Tristan Gingold | 2022-10-29 | 1 | -3/+8 |
| * | synth: handle copyback associations in any order. | Tristan Gingold | 2022-10-19 | 1 | -12/+30 |
| * | synth-vhdl_eval: handle std_logic_misc reduce functions | Tristan Gingold | 2022-10-19 | 1 | -0/+27 |
| * | synth-vhdl_oper: handle xor/nand/nor/xnor reduce from std_logic_misc | Tristan Gingold | 2022-10-19 | 1 | -16/+34 |
| * | synth-vhdl_oper: handle and_reduce. Fix #2224 | Tristan Gingold | 2022-10-19 | 1 | -1/+10 |
| * | synth: extract elab-vhdl_utils from synth-vhdl_stmts. | Tristan Gingold | 2022-10-18 | 3 | -142/+241 |
| * | vhdl-sem_assocs: handle association with external signal names. | Tristan Gingold | 2022-10-18 | 4 | -63/+77 |
| * | win64: fix FP argument passing | Tristan Gingold | 2022-10-17 | 1 | -2/+8 |
