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* synth: fix crash for port subtype in component.Tristan Gingold2019-10-061-1/+1
* synth: handle /= with non-matching length. For #968Tristan Gingold2019-10-061-6/+10
* netlists: remove get_parent for instance.Tristan Gingold2019-10-061-2/+0
* netlists: remove get_parent renaming for input.Tristan Gingold2019-10-065-6/+5
* netlists: remove renaming of Get_Parent for Net.Tristan Gingold2019-10-0612-33/+34
* netlists: remove get_name renaming for modules.Tristan Gingold2019-10-064-9/+8
* netlists: Remove Get_Name renaming for instances.Tristan Gingold2019-10-065-10/+9
* synth: handle neg for integers.Tristan Gingold2019-10-061-0/+13
* synth: add error messages for latches.Tristan Gingold2019-10-066-6/+198
* netlists-dump: add prefix to numbers.Tristan Gingold2019-10-061-8/+8
* errorout: reserve eargs for synthesis.Tristan Gingold2019-10-062-1/+21
* Rework errors handling, to have a more generic framework.Tristan Gingold2019-10-065-206/+239
* synth: fix selected signal assignment (use basetype).Tristan Gingold2019-10-051-1/+1
* synth: add support for comp. equal of two numeric signed (#966)T. Meissner2019-10-051-0/+4
* synth: support block declarations.Tristan Gingold2019-10-051-2/+16
* synth: minimal support for blocks. Fix #965Tristan Gingold2019-10-052-0/+19
* netlists-disp_vhdl: handle lsl, rol, asr, nand, nor.Tristan Gingold2019-10-041-0/+18
* netlists-disp_vhdl: add qualification when needed for =Tristan Gingold2019-10-041-5/+24
* netlists-disp_vhdl: handle empty operand for concat2, addTristan Gingold2019-10-041-1/+30
* netlists-disp_vhdl: handle id_negTristan Gingold2019-10-041-0/+2
* synth: preliminary work to support procedure calls.Tristan Gingold2019-10-041-118/+200
* synth: factorize code to read memories.Tristan Gingold2019-10-043-74/+47
* synth: regenerate ghdlsynth_gates.hTristan Gingold2019-10-031-1/+1
* synth-oper: convert type of unary operation operand.Tristan Gingold2019-10-033-4/+12
* synth: factorize code for synth_target.Tristan Gingold2019-10-031-86/+24
* netlists: rename id_memidx1 to id_memidxTristan Gingold2019-10-035-13/+13
* synth: remove unused wlen field of bound_type.Tristan Gingold2019-10-034-10/+1
* synth-inference: minor improvement.Tristan Gingold2019-10-031-10/+9
* synth-inference: fix handling of reset/preset chains inTristan Gingold2019-10-031-3/+7
* synth-oper: handle non-constant integer divisions.Tristan Gingold2019-10-031-2/+1
* synth-context: slightly relax assertion.Tristan Gingold2019-10-031-1/+12
* synth: replace memidx2 by addidx; handle some 2d arrays.Tristan Gingold2019-10-038-58/+115
* synth: rework synth_target.Tristan Gingold2019-10-021-26/+19
* synth: simplify dyn_insert.Tristan Gingold2019-10-025-18/+11
* synth: simplify id_dyn_extract.Tristan Gingold2019-10-025-22/+9
* synth: refactoring for memidx1.Tristan Gingold2019-10-023-32/+47
* synth: introduce memidx1Tristan Gingold2019-10-027-28/+35
* netlists: add memidx1 and memidx2 gates.Tristan Gingold2019-10-024-8/+101
* synth: fix extract_merge_partial_assigns.Tristan Gingold2019-10-021-5/+15
* netlists-disp_vhdl: handle Const_Log, add comments, fix assertion.Tristan Gingold2019-10-023-1/+28
* ghdlsynth: display bugbox in case of unknown exception.Tristan Gingold2019-10-021-1/+3
* Regenerate ghdlsynth_gates.hTristan Gingold2019-10-021-19/+24
* netlists-disp_vhdl: display constant signals connected to user submodules.Tristan Gingold2019-10-011-0/+2
* synth: handle string subtype defined by a port. Fix #958Tristan Gingold2019-10-012-7/+20
* synth: fix in extract_merge_partial_assigns.Tristan Gingold2019-10-012-3/+10
* synth-environment-debug: add dump_partial_assign.Tristan Gingold2019-10-011-10/+17
* synth: fix a crash on choice by range for aggregate.Tristan Gingold2019-10-011-1/+2
* synth: add support for integer rem.Tristan Gingold2019-10-014-3/+12
* synth: handle selected element of const record.Tristan Gingold2019-10-011-5/+8
* synth: improve support of arrays or arrays. Fix #955Tristan Gingold2019-10-0110-62/+110
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