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Author
Age
Files
Lines
*
vhdl: handle selected waveform assignment
Tristan Gingold
2023-03-09
3
-51
/
+75
*
psl-optimize: add comments
Tristan Gingold
2023-03-08
1
-1
/
+6
*
psl-disp_nfas: improve output
Tristan Gingold
2023-03-08
1
-7
/
+9
*
psl-build.adb(build_plus_repeat): fix handling of single edge NFA
Tristan Gingold
2023-03-08
1
-3
/
+15
*
Update NEWS and copyright date
Tristan Gingold
2023-03-06
1
-1
/
+1
*
synth-vhdl_oper: handle to_01. Fix #2372
Tristan Gingold
2023-03-05
1
-0
/
+1
*
synth-vhdl_stmts: handle unaffected in conditional variable assignments
Tristan Gingold
2023-03-02
1
-3
/
+11
*
synth-vhd_oper: handle rising_edge for bit. For #2369
Tristan Gingold
2023-03-02
1
-8
/
+11
*
synth: handle unaffected in simple sequential signal assignment.
Tristan Gingold
2023-02-25
1
-4
/
+9
*
grt/Makefile.inc: do not use version-script on FreeBSD.
Tristan Gingold
2023-02-24
1
-1
/
+4
*
trans-chap2.adb: fix a warning
Tristan Gingold
2023-02-22
1
-1
/
+0
*
synth-vhdl_expr: improve subtype conversion
Tristan Gingold
2023-02-22
1
-69
/
+160
*
vhdl-sem_decls(sem_object_type_from_value): refine.
Tristan Gingold
2023-02-19
1
-5
/
+20
*
trans-chap2: elaborate dependencies of macro-expanded packages.
Tristan Gingold
2023-02-19
1
-19
/
+38
*
sem_record_aggregate: add a check for constraints. Fix #2350
Tristan Gingold
2023-02-13
1
-11
/
+23
*
ghdl: print llvm or gcc backend version with --version
Tristan Gingold
2023-02-12
2
-2
/
+6
*
ghdllocal, ghdlxml: adjust after previous commit; fix #2349
Tristan Gingold
2023-02-11
2
-0
/
+6
*
vhdl-sem_lib: units during analysis can depend only on analyzed units.
Tristan Gingold
2023-02-11
1
-0
/
+6
*
synth-vhdl_eval: handle std_logic_arith.conv_std_logic_vector
Tristan Gingold
2023-02-09
3
-0
/
+43
*
synth: preliminary work for PSL endpoints
Tristan Gingold
2023-02-08
2
-1
/
+19
*
simul: improve support of PSL endpoints
Tristan Gingold
2023-02-08
2
-10
/
+12
*
simul: improve handling of individual signal associations
Tristan Gingold
2023-02-08
1
-3
/
+3
*
synth: do not handle null-vectors for to_hstring.
Tristan Gingold
2023-02-08
2
-1
/
+18
*
trans-chap8: fix a crash while checking bounds in signal assignments.
Tristan Gingold
2023-02-08
1
-1
/
+1
*
trans-chap8: Fix individual assocs of signal parameters
Tristan Gingold
2023-02-08
1
-22
/
+44
*
simul: handle signal assignment to procedure individual associations
Tristan Gingold
2023-02-08
1
-8
/
+19
*
trans-chap8: minor reindentation
Tristan Gingold
2023-02-08
1
-1
/
+1
*
synth: use same layout for records in memory as translate
Tristan Gingold
2023-02-08
10
-70
/
+229
*
vhdl-canon: remove signal parameters for all-sensitized processes.
Tristan Gingold
2023-02-08
4
-9
/
+54
*
synth: preliminary work to compute access bounds size
Tristan Gingold
2023-02-05
3
-2
/
+128
*
elab-vhdl_objtypes: rename acc_bnd_sz to acc_type_sz
Tristan Gingold
2023-02-05
3
-7
/
+7
*
vhdl-prints: improve output of generate statements
Tristan Gingold
2023-02-04
1
-12
/
+5
*
translate: add --no-elaboration flag
Tristan Gingold
2023-02-04
5
-2
/
+10
*
elab-vhdl_debug: handle package in subprograms
Tristan Gingold
2023-02-04
1
-0
/
+13
*
simul: refactoring, expose more subprograms
Tristan Gingold
2023-02-04
3
-35
/
+47
*
mcode/ortho_jit.adb: add option --be-g
Tristan Gingold
2023-02-04
1
-1
/
+1
*
vhdl-sem_decls: fix a regression on subtype indication. Fix #2336
Tristan Gingold
2023-02-03
1
-1
/
+1
*
vhdl: reduce use of is_anonymous_type_definition
Tristan Gingold
2023-02-03
6
-34
/
+40
*
TBM
Tristan Gingold
2023-02-02
4
-12
/
+56
*
translate: improve support for Flag_Elaboration
Tristan Gingold
2023-02-02
2
-2
/
+10
*
vhdl: avoid error storms in assertions
Tristan Gingold
2023-02-02
2
-2
/
+4
*
trans-chap3: minor rewrite
Tristan Gingold
2023-02-02
1
-1
/
+1
*
translate: rework translate_object_subtype_indication.
Tristan Gingold
2023-02-02
5
-66
/
+83
*
psl-build: fix fusion with epsilon. Fix #2336
Tristan Gingold
2023-01-31
1
-0
/
+1
*
translate: add a flag to disable elaboration
Tristan Gingold
2023-01-31
3
-106
/
+125
*
elab-debugger: also pass top instance on break_time
Tristan Gingold
2023-01-31
3
-4
/
+4
*
ghdlsimul: extract simul-main from simul-vhdl_simul
Tristan Gingold
2023-01-31
6
-110
/
+186
*
vhdl-prints: minor rewrite
Tristan Gingold
2023-01-31
1
-31
/
+33
*
PSL: optimize True for goto_repeat
Tristan Gingold
2023-01-31
1
-5
/
+17
*
psl-disp_nfas: add Dump_NFA
Tristan Gingold
2023-01-31
2
-0
/
+57
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