iCE40/ghdl - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
...
* \|	synth: ignore report statement.	Tristan Gingold	2019-08-30	1	-0/+2
* \|	vhdl: recognize ieee.numeric_std std_match.	Tristan Gingold	2019-08-30	2	-0/+39
* \|	std_names: add std_match	Tristan Gingold	2019-08-30	2	-3/+5
* \|	vhdl: recognize 1164 condition operator, handle in synth.	Tristan Gingold	2019-08-30	3	-5/+19
* \|	synth: handle enumeration subtype in ranges.	Tristan Gingold	2019-08-30	1	-1/+2
* \|	synth: fix named association in record aggregate.	Tristan Gingold	2019-08-30	1	-1/+3
\|/
*	synth: add support for record types.	Tristan Gingold	2019-08-29	13	-82/+361
*	synth: Integer operators (#902)	marph91	2019-08-28	1	-0/+16
*	synth: support sequential conditional signal assignment.	Tristan Gingold	2019-08-27	2	-0/+3
*	synth: rework partial assignments	Tristan Gingold	2019-08-27	10	-182/+608
*	netlists-disp_vhdl: do not used literals for prefixes.	Tristan Gingold	2019-08-27	1	-12/+53
*	ignore restrict in simulation (#897)	Pepijn de Vos	2019-08-20	2	-18/+17
*	synth: add support for constant exponentiation.	Tristan Gingold	2019-08-20	1	-0/+10
*	synth: set name to assert/assume gates.	Tristan Gingold	2019-08-20	4	-12/+44
*	netlist: fix minor pasto.	Tristan Gingold	2019-08-20	1	-1/+1
*	initial support for reduce and/or (#900)	Pepijn de Vos	2019-08-20	5	-6/+52
*	vhdl psl: fully scan PSL keywords in scanner.	Tristan Gingold	2019-08-20	7	-67/+148
*	vhdl-prints: handle architecture in verification unit hierarchical name.	Tristan Gingold	2019-08-20	1	-0/+7
*	vhdl: handle architecture in verification unit hierarchical name.	Tristan Gingold	2019-08-20	3	-13/+53
*	vhdl-prints: handle verification units.	Tristan Gingold	2019-08-20	1	-318/+354
*	vhdl: handle assume in verification units.	Tristan Gingold	2019-08-20	5	-1/+11
*	synth: analyze input files.	Tristan Gingold	2019-08-20	1	-1/+8
*	synth: set location on assume/assert gates.	Tristan Gingold	2019-08-20	3	-8/+19
*	synth: handle verification units.	Tristan Gingold	2019-08-20	13	-246/+450
*	synth: handle array attribute "length" (#895)	marph91	2019-08-19	1	-0/+10
*	synth: fix tgingold/ghdlsynth#34 (association).	Tristan Gingold	2019-08-17	1	-2/+1
*	vhdl: parse verification unit (WIP).	Tristan Gingold	2019-08-17	15	-363/+549
*	synth: handle integer values in subtype conversion.	Tristan Gingold	2019-08-16	1	-0/+2
*	synth: handle integers for displaying vhdl ports.	Tristan Gingold	2019-08-16	1	-0/+10
*	vhdl: declare verification units (WIP).	Tristan Gingold	2019-08-16	12	-280/+551
*	vhdl: recognize PSL units reserved words.	Tristan Gingold	2019-08-16	6	-14/+29
*	synth: handle array attributes; handle integer subtypes in generics.	Tristan Gingold	2019-08-16	2	-2/+91
*	add synthesis support for logic operators on numeric types (#893)	Pepijn de Vos	2019-08-15	4	-4/+149
*	synth: fix handling of assume/assert.	Tristan Gingold	2019-08-14	1	-6/+65
*	ghdlsynth: add command to get libghdl paths.	Tristan Gingold	2019-08-14	4	-22/+97
*	ghdldrv: move command_str_disp from ghdlvpi to ghdlmain	Tristan Gingold	2019-08-14	3	-38/+38
*	ghdlsynth: declare init_for_ghdl_synth.	Tristan Gingold	2019-08-14	1	-1/+4
*	vhdl: handle PSL keywords as vhdl08 reserved words; switch to PSL scanner mode.	Tristan Gingold	2019-08-14	2	-0/+12
*	vhdl: add PSL keywords to vhdl08 reserved words.	Tristan Gingold	2019-08-14	10	-242/+257
*	synth: also extract edge in PSL expressions.	Tristan Gingold	2019-08-13	3	-18/+36
*	synth: extract edge for PSL clocks.	Tristan Gingold	2019-08-13	1	-27/+34
*	vhdl-nodes_walk: handle iir_kind_psl_default_clock.	Tristan Gingold	2019-08-13	1	-1/+2
*	libghdlsynth: make it almost empty, as libghdl will be used instead.	Tristan Gingold	2019-08-13	1	-8/+0
*	Support for PSL assert and assume in synthesis (#892)	Pepijn de Vos	2019-08-13	1	-4/+53
*	libghdl: also add synthesis part. For #884	Tristan Gingold	2019-08-13	6	-52/+56
*	synth: build_header was replaced by a Makefile target.	Tristan Gingold	2019-08-13	1	-8/+0
*	libghdl: preliminary work to also support synth.	Tristan Gingold	2019-08-13	2	-4/+9
*	vhdl: improve reprint of inertial association.	Tristan Gingold	2019-08-11	6	-181/+206
*	vhdl-sem: fix minor thinko for sem_insert_anonymous_signal.	Tristan Gingold	2019-08-11	1	-1/+24
*	vhdl: avoid crash on incorrect unit name.	Tristan Gingold	2019-08-10	2	-6/+36