| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| ... | |
| * | synth: improve error message for ghdl/ghdl-yosys-plugin#179 | Tristan Gingold | 2022-11-15 | 1 | -1/+3 |
| * | synth: avoid a crash on signal assignment in non-sensitized process. | Tristan Gingold | 2022-11-14 | 1 | -2/+9 |
| * | Remove trailing spaces | Tristan Gingold | 2022-11-08 | 2 | -2/+2 |
| * | elab-vhdl_expr: fix a crash on simple aggregates. Fix #2240 | Tristan Gingold | 2022-11-08 | 2 | -15/+13 |
| * | vhdl: fix some compiler warnings | Tristan Gingold | 2022-11-08 | 3 | -6/+2 |
| * | vhdl-sem_expr: fix a crash after error. Fix #2239 | Tristan Gingold | 2022-11-08 | 1 | -0/+2 |
| * | Added id to warnings related to attributes. (#2242) | cderrien | 2022-11-08 | 5 | -2/+25 |
| * | Escape port name in dot output. (#2241) | cderrien | 2022-11-08 | 1 | -1/+1 |
| * | vhdl/translate: handle predefined operators as conversion functions | Tristan Gingold | 2022-11-07 | 3 | -44/+73 |
| * | netlists-memories: refactoring | Tristan Gingold | 2022-11-06 | 1 | -113/+105 |
| * | netlists-memories: factorize code. | Tristan Gingold | 2022-11-06 | 1 | -83/+41 |
| * | netlists: factorize code | Tristan Gingold | 2022-11-06 | 1 | -100/+56 |
| * | synth-environment.adb: fix warning | Tristan Gingold | 2022-11-05 | 1 | -1/+0 |
| * | synth: rework memory inference. Fix #2232 | Tristan Gingold | 2022-11-05 | 3 | -78/+233 |
| * | netlists-builders: allow building mem_wr_sync without clk and en. | Tristan Gingold | 2022-11-05 | 1 | -4/+10 |
| * | synth: infere a dff (instead of an idff) when the init value is X | Tristan Gingold | 2022-11-03 | 2 | -6/+21 |
| * | vhdl-sem_expr(sem_qualified_expression): relax staticness rules. | Tristan Gingold | 2022-11-02 | 1 | -1/+11 |
| * | synth: handle bit/unsigned and bit/signed vhdl 08 operators. | Tristan Gingold | 2022-11-02 | 1 | -12/+36 |
| * | Add missing -g for generic override to CLI help for RUNOPTS (#2220) | svnesbo | 2022-11-01 | 1 | -0/+1 |
| * | netlists-inference: handle flip-flop with different patterns. | Tristan Gingold | 2022-10-30 | 1 | -23/+75 |
| * | netlists-gates: add a comment | Tristan Gingold | 2022-10-30 | 1 | -0/+1 |
| * | vhdl-sem_names(sem_name_free): handle iir_kind_slice_name. For #2233 | Tristan Gingold | 2022-10-29 | 1 | -0/+1 |
| * | vhdl-evaluation: handle to_string_digits. For #2233 | Tristan Gingold | 2022-10-29 | 1 | -5/+50 |
| * | synth: internal refactoring | Tristan Gingold | 2022-10-29 | 4 | -121/+93 |
| * | elab-vhdl_types: abstract elab_floating_type_definition | Tristan Gingold | 2022-10-29 | 1 | -10/+15 |
| * | synth: fix crash in disp_verilog. Fix #2234 | Tristan Gingold | 2022-10-29 | 1 | -3/+8 |
| * | synth: handle copyback associations in any order. | Tristan Gingold | 2022-10-19 | 1 | -12/+30 |
| * | synth-vhdl_eval: handle std_logic_misc reduce functions | Tristan Gingold | 2022-10-19 | 1 | -0/+27 |
| * | synth-vhdl_oper: handle xor/nand/nor/xnor reduce from std_logic_misc | Tristan Gingold | 2022-10-19 | 1 | -16/+34 |
| * | synth-vhdl_oper: handle and_reduce. Fix #2224 | Tristan Gingold | 2022-10-19 | 1 | -1/+10 |
| * | synth: extract elab-vhdl_utils from synth-vhdl_stmts. | Tristan Gingold | 2022-10-18 | 3 | -142/+241 |
| * | vhdl-sem_assocs: handle association with external signal names. | Tristan Gingold | 2022-10-18 | 4 | -63/+77 |
| * | win64: fix FP argument passing | Tristan Gingold | 2022-10-17 | 1 | -2/+8 |
| * | vhdl-sem_expr.adb: avoid crash after error on aggregate. Fix #2218 | Tristan Gingold | 2022-10-16 | 1 | -0/+6 |
| * | vhdl-sem_expr.adb(is_string_type): check character type. | Tristan Gingold | 2022-10-16 | 1 | -1/+3 |
| * | vhdl-parse.adb: handle external names as assignment target. | Tristan Gingold | 2022-10-14 | 1 | -2/+4 |
| * | synth: handle record conversion | Tristan Gingold | 2022-10-14 | 1 | -0/+3 |
| * | synth-vhdl_expr: support alias in indexed names | Tristan Gingold | 2022-10-14 | 1 | -1/+2 |
| * | synth: avoid extra conversion during alias elaboration | Tristan Gingold | 2022-10-14 | 1 | -6/+4 |
| * | simul: fix spurious error about multiple drivers | Tristan Gingold | 2022-10-14 | 1 | -0/+2 |
| * | simul: handle delayed attribute | Tristan Gingold | 2022-10-14 | 2 | -6/+66 |
| * | synth: handle alias of access objects. | Tristan Gingold | 2022-10-13 | 1 | -1/+1 |
| * | simul: handle last_event and last_active | Tristan Gingold | 2022-10-13 | 3 | -4/+114 |
| * | elab-vhd_expr: handle more cases in exec_type_of_object | Tristan Gingold | 2022-10-13 | 1 | -1/+4 |
| * | simul-vhdl_simul: keep default value of collapsed signals | Tristan Gingold | 2022-10-13 | 1 | -1/+10 |
| * | simul-vhdl_elab: fix crash on association with implicit signals | Tristan Gingold | 2022-10-13 | 1 | -1/+4 |
| * | simul: fix a crash due to missing stride | Tristan Gingold | 2022-10-13 | 1 | -5/+7 |
| * | synth-vhdl_stmts(synth_verification_unit): always set instance_pool. | Tristan Gingold | 2022-10-13 | 1 | -1/+3 |
| * | synth: fix crashes on scalar attribute with anonymous subtype. | Tristan Gingold | 2022-10-10 | 1 | -2/+2 |
| * | vhdl-canon: avoid a crash on optionnal condition. Fix #2212 | Tristan Gingold | 2022-10-10 | 1 | -1/+1 |
