aboutsummaryrefslogtreecommitdiffstats
path: root/src/vhdl
Commit message (Expand)AuthorAgeFilesLines
* vhdl-prints: add Print_StringTristan Gingold2023-01-264-40/+154
* vhdl-evaluation: refactoringTristan Gingold2023-01-261-49/+22
* vhdl-sem_decls: allow use on non-elaborated functions in generic typesTristan Gingold2023-01-261-3/+9
* vhdl-sem_decl: handle subtype of interface type. Fix #2326Tristan Gingold2023-01-261-0/+1
* vhdl-sem_names: adjust for for element attributeTristan Gingold2023-01-261-0/+1
* vhdl: improve range checks, fix #2323Tristan Gingold2023-01-256-236/+473
* ghdldrv: extract trans_link from ghdlrunTristan Gingold2023-01-212-0/+495
* vhdl: refactoring - remove trans_be, mainly added to vhdl-back_endTristan Gingold2023-01-168-269/+261
* vhdl-sem.adb: also check elaboration status within package bodiesTristan Gingold2023-01-151-6/+19
* vhdl: add a warning to detect use before elaborationTristan Gingold2023-01-157-0/+92
* vhdl: add Get/Set_Elaboration_FlagTristan Gingold2023-01-144-265/+326
* simul: handle PSL abortsTristan Gingold2023-01-121-0/+4
* vhdl-sem_assocs(rewrite_non_object_association): set flagTristan Gingold2023-01-121-0/+1
* vhdl: clear associated_type in Sem_Generic_Association_ChainTristan Gingold2023-01-124-9/+83
* synth: fix handle of protected type bodies within instantiated packages.Tristan Gingold2023-01-122-1/+22
* vhdl-sem_names: finish prefix of element attribute namesTristan Gingold2023-01-121-22/+32
* synth-vhdl_eval: handle to_X01 for bit to std_ulogic.Tristan Gingold2023-01-111-0/+27
* vhdl-configuration: relax top-level unit restrictionsTristan Gingold2023-01-111-4/+5
* simul: improve support of psl in debuggerTristan Gingold2023-01-111-4/+10
* vhdl-sem_inst: adjust instantiation of interface typeTristan Gingold2023-01-101-0/+3
* synth: add comments, minor rewriteTristan Gingold2023-01-101-4/+5
* vhdl-sem_inst: fix build of suspend state chainTristan Gingold2023-01-101-1/+1
* vhdl-prints: handle suspend state declarations and statementsTristan Gingold2023-01-101-2/+22
* vhdl-sem_lib: disable warnings for -c/-m on ieee units. For #2200Tristan Gingold2023-01-061-2/+20
* trans-chap3: fix style for old compilersTristan Gingold2023-01-051-0/+1
* vhdl-sem_expr: extract is_expressionTristan Gingold2023-01-042-18/+30
* vhdl-errors(disp_node): fix a crash on protected type bodyTristan Gingold2023-01-041-1/+2
* vhdl-sem_inst: handle suspend_stateTristan Gingold2023-01-046-186/+293
* simul: handle force/release signal assignmentsTristan Gingold2023-01-032-4/+6
* synth: add support of interface subprogramTristan Gingold2023-01-031-2/+10
* trans-chap7: handle unbounded expressions in aggregates.Tristan Gingold2022-12-311-24/+39
* vhdl-canon: handle unaffectedTristan Gingold2022-12-261-0/+1
* vhdl-sem_stmts: simplify code, add commentsTristan Gingold2022-12-231-27/+5
* vhdl-sem_inst: avoid a crash after error on package instantiationTristan Gingold2022-12-231-0/+2
* vhdl-disp_tree: display name_id as a number (and not like a node id)Tristan Gingold2022-12-231-2/+1
* trans-chap5.adb: handle package association in entities.Tristan Gingold2022-12-234-20/+27
* vhdl-sem_inst: factorize codeTristan Gingold2022-12-231-39/+12
* vhdl-sem_inst: add instantiate_component_declaration.Tristan Gingold2022-12-234-5/+139
* vhdl-parse: handle 'end for' in configuration specification.Tristan Gingold2022-12-214-286/+330
* files_comments: add comments, slightly simplify the interfaceTristan Gingold2022-12-202-4/+4
* vhdl-evaluation: handle default value for ieee operators.Tristan Gingold2022-12-191-0/+9
* vhdl: add Get/Set_Associated_package. For #2264Tristan Gingold2022-12-186-202/+275
* vhdl-sem_inst: add instantiate_interface_package_declarationTristan Gingold2022-12-183-2/+50
* vhdl-evaluation: handle bit to_hstring.Tristan Gingold2022-12-171-1/+3
* vhdl/translate/ortho_front.adb: avoid crash after errors.Tristan Gingold2022-12-161-0/+5
* vhdl-nodes: add Get/Set_Instantiated_Header.Tristan Gingold2022-12-165-105/+146
* vhdl: minor refactoringTristan Gingold2022-12-124-22/+13
* trans-chap7.adb: handle any expression for bounds.Tristan Gingold2022-12-111-2/+3
* trans-chap7: handle unconstrained vector in bounded aggregate.Tristan Gingold2022-12-111-6/+10
* vhdl: handle dynamically bounded aggregates with unbounded element.Tristan Gingold2022-12-102-50/+142
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-08 03:32:13 +0000