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Author
Age
Files
Lines
*
vhdl-canon: add Canon_Add_Suspend_State
Tristan Gingold
2022-05-26
1
-1
/
+5
*
vhdl: parse return identifier (v19)
Tristan Gingold
2022-03-04
1
-0
/
+2
*
vhdl: parse PSL inherit spec. For #1899
Tristan Gingold
2021-11-04
1
-2
/
+2
*
Add parsing of case? statement and simple test.
Brian Padalino
2021-09-24
1
-0
/
+2
*
vhdl and psl: parse sync_abort and async_abort. For #1654
Tristan Gingold
2021-08-30
1
-0
/
+2
*
vhdl: remove unused Get/Set_Alias_Declaration
Tristan Gingold
2021-05-16
1
-2
/
+0
*
vhdl: add Iir_Kind_Foreign_Module
Tristan Gingold
2021-04-05
1
-1
/
+3
*
update license headers
umarcor
2021-01-14
1
-11
/
+9
*
vhdl: fix reprint of vhdl08 array element constraints.
Tristan Gingold
2021-01-05
1
-0
/
+4
*
vhdl: handle locally static attributes on entity/architecture/configurations
Tristan Gingold
2020-12-08
1
-0
/
+2
*
vhdl: parse subprogram instantiations. For #1470
Tristan Gingold
2020-09-24
1
-0
/
+3
*
vhdl: parse and analyze force/release signal assignment statements.
Tristan Gingold
2020-08-01
1
-0
/
+10
*
vhdl: replace base_type with parent_type in nodes
Tristan Gingold
2020-07-22
1
-2
/
+2
*
vhdl: create default configuration for a vunit. Fix #1372
Tristan Gingold
2020-06-15
1
-0
/
+3
*
Synthesis of PSL prev function.
Tristan Gingold
2020-06-02
1
-2
/
+2
*
vhdl: parse PSL prev/stable/rose/fell builtin calls. For #662
Tristan Gingold
2020-06-02
1
-1
/
+7
*
types: introduce Direction_Type, which replaces Iir_Direction.
Tristan Gingold
2020-04-20
1
-6
/
+6
*
vhdl: add scalar_size. Size of scalar types is computed during analysis.
Tristan Gingold
2020-04-06
1
-0
/
+8
*
synthesis: add option --vendor-library= for synthesis.
Tristan Gingold
2020-03-10
1
-0
/
+2
*
ams-vhdl: handle zoh, ltf and ztf attributes.
Tristan Gingold
2019-12-31
1
-0
/
+4
*
ams-vhdl: check nature for record natures and terminals.
Tristan Gingold
2019-12-30
1
-0
/
+2
*
vhdl: improve support of AMS-vhdl (array and record natures, source quantities)
Tristan Gingold
2019-12-28
1
-0
/
+44
*
vhdl: add Has_Delay_Machanism for optional 'inertial' printing.
Tristan Gingold
2019-12-26
1
-0
/
+2
*
vhdl: add exit/next flags.
Tristan Gingold
2019-09-18
1
-0
/
+4
*
vhdl: renames Conditional_Expression to Conditional_Expression_Chain.
Tristan Gingold
2019-09-02
1
-2
/
+2
*
synth: handle verification units.
Tristan Gingold
2019-08-20
1
-0
/
+2
*
vhdl: declare verification units (WIP).
Tristan Gingold
2019-08-16
1
-0
/
+6
*
vhdl: remove unused Get/Set_Choice_Order.
Tristan Gingold
2019-08-09
1
-2
/
+0
*
vhdl-disp_vhdl: print literals and identifiers from the source.
Tristan Gingold
2019-05-29
1
-0
/
+2
*
vhdl: get rid of Get/Set_Physical_Unit.
Tristan Gingold
2019-05-28
1
-2
/
+0
*
psl: add psl-types, psl-nodes_priv.
Tristan Gingold
2019-05-10
1
-0
/
+1
*
vhdl: replace Iir_Int64 by Int64, and Iir_Fp64 by Fp64.
Tristan Gingold
2019-05-10
1
-12
/
+12
*
vhdl: move nodes_meta package to vhdl child.
Tristan Gingold
2019-05-06
1
-0
/
+924